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7e9080e1c6
Signed-off-by: John Garry <john.garry@huawei.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Hannes Reinecke <hare@suse.de> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
423 lines
11 KiB
C
423 lines
11 KiB
C
/*
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* Copyright (c) 2015 Linaro Ltd.
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* Copyright (c) 2015 Hisilicon Limited.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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*/
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#include "hisi_sas.h"
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#define DRV_NAME "hisi_sas"
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static void hisi_sas_slot_index_clear(struct hisi_hba *hisi_hba, int slot_idx)
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{
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void *bitmap = hisi_hba->slot_index_tags;
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clear_bit(slot_idx, bitmap);
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}
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static void hisi_sas_slot_index_init(struct hisi_hba *hisi_hba)
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{
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int i;
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for (i = 0; i < hisi_hba->slot_index_count; ++i)
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hisi_sas_slot_index_clear(hisi_hba, i);
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}
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static struct scsi_transport_template *hisi_sas_stt;
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static struct scsi_host_template hisi_sas_sht = {
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.module = THIS_MODULE,
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.name = DRV_NAME,
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.queuecommand = sas_queuecommand,
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.target_alloc = sas_target_alloc,
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.slave_configure = sas_slave_configure,
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.change_queue_depth = sas_change_queue_depth,
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.bios_param = sas_bios_param,
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.can_queue = 1,
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.this_id = -1,
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.sg_tablesize = SG_ALL,
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.max_sectors = SCSI_DEFAULT_MAX_SECTORS,
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.use_clustering = ENABLE_CLUSTERING,
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.eh_device_reset_handler = sas_eh_device_reset_handler,
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.eh_bus_reset_handler = sas_eh_bus_reset_handler,
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.target_destroy = sas_target_destroy,
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.ioctl = sas_ioctl,
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};
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static struct sas_domain_function_template hisi_sas_transport_ops = {
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};
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static int hisi_sas_alloc(struct hisi_hba *hisi_hba, struct Scsi_Host *shost)
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{
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int i, s;
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struct platform_device *pdev = hisi_hba->pdev;
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struct device *dev = &pdev->dev;
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for (i = 0; i < hisi_hba->queue_count; i++) {
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struct hisi_sas_cq *cq = &hisi_hba->cq[i];
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/* Completion queue structure */
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cq->id = i;
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cq->hisi_hba = hisi_hba;
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/* Delivery queue */
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s = sizeof(struct hisi_sas_cmd_hdr) * HISI_SAS_QUEUE_SLOTS;
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hisi_hba->cmd_hdr[i] = dma_alloc_coherent(dev, s,
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&hisi_hba->cmd_hdr_dma[i], GFP_KERNEL);
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if (!hisi_hba->cmd_hdr[i])
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goto err_out;
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memset(hisi_hba->cmd_hdr[i], 0, s);
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/* Completion queue */
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s = hisi_hba->hw->complete_hdr_size * HISI_SAS_QUEUE_SLOTS;
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hisi_hba->complete_hdr[i] = dma_alloc_coherent(dev, s,
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&hisi_hba->complete_hdr_dma[i], GFP_KERNEL);
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if (!hisi_hba->complete_hdr[i])
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goto err_out;
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memset(hisi_hba->complete_hdr[i], 0, s);
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}
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s = HISI_SAS_STATUS_BUF_SZ;
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hisi_hba->status_buffer_pool = dma_pool_create("status_buffer",
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dev, s, 16, 0);
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if (!hisi_hba->status_buffer_pool)
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goto err_out;
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s = HISI_SAS_COMMAND_TABLE_SZ;
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hisi_hba->command_table_pool = dma_pool_create("command_table",
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dev, s, 16, 0);
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if (!hisi_hba->command_table_pool)
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goto err_out;
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s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_itct);
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hisi_hba->itct = dma_alloc_coherent(dev, s, &hisi_hba->itct_dma,
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GFP_KERNEL);
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if (!hisi_hba->itct)
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goto err_out;
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memset(hisi_hba->itct, 0, s);
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hisi_hba->slot_info = devm_kcalloc(dev, HISI_SAS_COMMAND_ENTRIES,
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sizeof(struct hisi_sas_slot),
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GFP_KERNEL);
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if (!hisi_hba->slot_info)
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goto err_out;
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s = HISI_SAS_COMMAND_ENTRIES * sizeof(struct hisi_sas_iost);
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hisi_hba->iost = dma_alloc_coherent(dev, s, &hisi_hba->iost_dma,
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GFP_KERNEL);
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if (!hisi_hba->iost)
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goto err_out;
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memset(hisi_hba->iost, 0, s);
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s = HISI_SAS_COMMAND_ENTRIES * sizeof(struct hisi_sas_breakpoint);
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hisi_hba->breakpoint = dma_alloc_coherent(dev, s,
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&hisi_hba->breakpoint_dma, GFP_KERNEL);
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if (!hisi_hba->breakpoint)
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goto err_out;
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memset(hisi_hba->breakpoint, 0, s);
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hisi_hba->slot_index_count = HISI_SAS_COMMAND_ENTRIES;
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s = hisi_hba->slot_index_count / sizeof(unsigned long);
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hisi_hba->slot_index_tags = devm_kzalloc(dev, s, GFP_KERNEL);
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if (!hisi_hba->slot_index_tags)
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goto err_out;
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hisi_hba->sge_page_pool = dma_pool_create("status_sge", dev,
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sizeof(struct hisi_sas_sge_page), 16, 0);
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if (!hisi_hba->sge_page_pool)
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goto err_out;
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s = sizeof(struct hisi_sas_initial_fis) * HISI_SAS_MAX_PHYS;
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hisi_hba->initial_fis = dma_alloc_coherent(dev, s,
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&hisi_hba->initial_fis_dma, GFP_KERNEL);
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if (!hisi_hba->initial_fis)
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goto err_out;
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memset(hisi_hba->initial_fis, 0, s);
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s = HISI_SAS_COMMAND_ENTRIES * sizeof(struct hisi_sas_breakpoint) * 2;
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hisi_hba->sata_breakpoint = dma_alloc_coherent(dev, s,
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&hisi_hba->sata_breakpoint_dma, GFP_KERNEL);
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if (!hisi_hba->sata_breakpoint)
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goto err_out;
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memset(hisi_hba->sata_breakpoint, 0, s);
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hisi_sas_slot_index_init(hisi_hba);
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hisi_hba->wq = create_singlethread_workqueue(dev_name(dev));
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if (!hisi_hba->wq) {
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dev_err(dev, "sas_alloc: failed to create workqueue\n");
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goto err_out;
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}
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return 0;
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err_out:
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return -ENOMEM;
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}
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static void hisi_sas_free(struct hisi_hba *hisi_hba)
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{
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struct device *dev = &hisi_hba->pdev->dev;
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int i, s;
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for (i = 0; i < hisi_hba->queue_count; i++) {
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s = sizeof(struct hisi_sas_cmd_hdr) * HISI_SAS_QUEUE_SLOTS;
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if (hisi_hba->cmd_hdr[i])
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dma_free_coherent(dev, s,
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hisi_hba->cmd_hdr[i],
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hisi_hba->cmd_hdr_dma[i]);
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s = hisi_hba->hw->complete_hdr_size * HISI_SAS_QUEUE_SLOTS;
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if (hisi_hba->complete_hdr[i])
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dma_free_coherent(dev, s,
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hisi_hba->complete_hdr[i],
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hisi_hba->complete_hdr_dma[i]);
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}
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dma_pool_destroy(hisi_hba->status_buffer_pool);
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dma_pool_destroy(hisi_hba->command_table_pool);
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dma_pool_destroy(hisi_hba->sge_page_pool);
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s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_itct);
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if (hisi_hba->itct)
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dma_free_coherent(dev, s,
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hisi_hba->itct, hisi_hba->itct_dma);
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s = HISI_SAS_COMMAND_ENTRIES * sizeof(struct hisi_sas_iost);
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if (hisi_hba->iost)
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dma_free_coherent(dev, s,
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hisi_hba->iost, hisi_hba->iost_dma);
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s = HISI_SAS_COMMAND_ENTRIES * sizeof(struct hisi_sas_breakpoint);
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if (hisi_hba->breakpoint)
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dma_free_coherent(dev, s,
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hisi_hba->breakpoint,
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hisi_hba->breakpoint_dma);
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s = sizeof(struct hisi_sas_initial_fis) * HISI_SAS_MAX_PHYS;
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if (hisi_hba->initial_fis)
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dma_free_coherent(dev, s,
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hisi_hba->initial_fis,
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hisi_hba->initial_fis_dma);
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s = HISI_SAS_COMMAND_ENTRIES * sizeof(struct hisi_sas_breakpoint) * 2;
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if (hisi_hba->sata_breakpoint)
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dma_free_coherent(dev, s,
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hisi_hba->sata_breakpoint,
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hisi_hba->sata_breakpoint_dma);
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if (hisi_hba->wq)
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destroy_workqueue(hisi_hba->wq);
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}
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static struct Scsi_Host *hisi_sas_shost_alloc(struct platform_device *pdev,
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const struct hisi_sas_hw *hw)
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{
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struct resource *res;
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struct Scsi_Host *shost;
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struct hisi_hba *hisi_hba;
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struct device *dev = &pdev->dev;
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struct device_node *np = pdev->dev.of_node;
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struct property *sas_addr_prop;
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int num;
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shost = scsi_host_alloc(&hisi_sas_sht, sizeof(*hisi_hba));
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if (!shost)
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goto err_out;
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hisi_hba = shost_priv(shost);
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hisi_hba->hw = hw;
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hisi_hba->pdev = pdev;
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hisi_hba->shost = shost;
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SHOST_TO_SAS_HA(shost) = &hisi_hba->sha;
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sas_addr_prop = of_find_property(np, "sas-addr", NULL);
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if (!sas_addr_prop || (sas_addr_prop->length != SAS_ADDR_SIZE))
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goto err_out;
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memcpy(hisi_hba->sas_addr, sas_addr_prop->value, SAS_ADDR_SIZE);
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if (of_property_read_u32(np, "ctrl-reset-reg",
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&hisi_hba->ctrl_reset_reg))
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goto err_out;
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if (of_property_read_u32(np, "ctrl-reset-sts-reg",
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&hisi_hba->ctrl_reset_sts_reg))
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goto err_out;
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if (of_property_read_u32(np, "ctrl-clock-ena-reg",
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&hisi_hba->ctrl_clock_ena_reg))
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goto err_out;
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if (of_property_read_u32(np, "phy-count", &hisi_hba->n_phy))
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goto err_out;
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if (of_property_read_u32(np, "queue-count", &hisi_hba->queue_count))
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goto err_out;
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num = of_irq_count(np);
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hisi_hba->int_names = devm_kcalloc(dev, num,
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HISI_SAS_NAME_LEN,
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GFP_KERNEL);
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if (!hisi_hba->int_names)
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goto err_out;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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hisi_hba->regs = devm_ioremap_resource(dev, res);
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if (IS_ERR(hisi_hba->regs))
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goto err_out;
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hisi_hba->ctrl = syscon_regmap_lookup_by_phandle(
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np, "hisilicon,sas-syscon");
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if (IS_ERR(hisi_hba->ctrl))
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goto err_out;
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if (hisi_sas_alloc(hisi_hba, shost)) {
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hisi_sas_free(hisi_hba);
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goto err_out;
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}
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return shost;
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err_out:
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dev_err(dev, "shost alloc failed\n");
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return NULL;
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}
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static void hisi_sas_init_add(struct hisi_hba *hisi_hba)
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{
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int i;
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for (i = 0; i < hisi_hba->n_phy; i++)
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memcpy(&hisi_hba->phy[i].dev_sas_addr,
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hisi_hba->sas_addr,
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SAS_ADDR_SIZE);
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}
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int hisi_sas_probe(struct platform_device *pdev,
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const struct hisi_sas_hw *hw)
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{
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struct Scsi_Host *shost;
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struct hisi_hba *hisi_hba;
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struct device *dev = &pdev->dev;
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struct asd_sas_phy **arr_phy;
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struct asd_sas_port **arr_port;
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struct sas_ha_struct *sha;
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int rc, phy_nr, port_nr, i;
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shost = hisi_sas_shost_alloc(pdev, hw);
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if (!shost) {
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rc = -ENOMEM;
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goto err_out_ha;
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}
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sha = SHOST_TO_SAS_HA(shost);
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hisi_hba = shost_priv(shost);
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platform_set_drvdata(pdev, sha);
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if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64)) &&
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dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32))) {
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dev_err(dev, "No usable DMA addressing method\n");
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rc = -EIO;
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goto err_out_ha;
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}
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phy_nr = port_nr = hisi_hba->n_phy;
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arr_phy = devm_kcalloc(dev, phy_nr, sizeof(void *), GFP_KERNEL);
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arr_port = devm_kcalloc(dev, port_nr, sizeof(void *), GFP_KERNEL);
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if (!arr_phy || !arr_port)
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return -ENOMEM;
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sha->sas_phy = arr_phy;
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sha->sas_port = arr_port;
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sha->core.shost = shost;
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sha->lldd_ha = hisi_hba;
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shost->transportt = hisi_sas_stt;
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shost->max_id = HISI_SAS_MAX_DEVICES;
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shost->max_lun = ~0;
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shost->max_channel = 1;
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shost->max_cmd_len = 16;
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shost->sg_tablesize = min_t(u16, SG_ALL, HISI_SAS_SGE_PAGE_CNT);
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shost->can_queue = HISI_SAS_COMMAND_ENTRIES;
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shost->cmd_per_lun = HISI_SAS_COMMAND_ENTRIES;
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sha->sas_ha_name = DRV_NAME;
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sha->dev = &hisi_hba->pdev->dev;
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sha->lldd_module = THIS_MODULE;
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sha->sas_addr = &hisi_hba->sas_addr[0];
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sha->num_phys = hisi_hba->n_phy;
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sha->core.shost = hisi_hba->shost;
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for (i = 0; i < hisi_hba->n_phy; i++) {
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sha->sas_phy[i] = &hisi_hba->phy[i].sas_phy;
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sha->sas_port[i] = &hisi_hba->port[i].sas_port;
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}
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hisi_sas_init_add(hisi_hba);
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rc = scsi_add_host(shost, &pdev->dev);
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if (rc)
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goto err_out_ha;
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rc = sas_register_ha(sha);
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if (rc)
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goto err_out_register_ha;
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scsi_scan_host(shost);
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return 0;
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err_out_register_ha:
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scsi_remove_host(shost);
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err_out_ha:
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kfree(shost);
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return rc;
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}
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EXPORT_SYMBOL_GPL(hisi_sas_probe);
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int hisi_sas_remove(struct platform_device *pdev)
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{
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struct sas_ha_struct *sha = platform_get_drvdata(pdev);
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struct hisi_hba *hisi_hba = sha->lldd_ha;
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scsi_remove_host(sha->core.shost);
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sas_unregister_ha(sha);
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sas_remove_host(sha->core.shost);
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hisi_sas_free(hisi_hba);
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return 0;
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}
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EXPORT_SYMBOL_GPL(hisi_sas_remove);
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static __init int hisi_sas_init(void)
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{
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pr_info("hisi_sas: driver version %s\n", DRV_VERSION);
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hisi_sas_stt = sas_domain_attach_transport(&hisi_sas_transport_ops);
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if (!hisi_sas_stt)
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return -ENOMEM;
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return 0;
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}
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static __exit void hisi_sas_exit(void)
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{
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sas_release_transport(hisi_sas_stt);
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}
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module_init(hisi_sas_init);
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module_exit(hisi_sas_exit);
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MODULE_VERSION(DRV_VERSION);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("John Garry <john.garry@huawei.com>");
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MODULE_DESCRIPTION("HISILICON SAS controller driver");
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MODULE_ALIAS("platform:" DRV_NAME);
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