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Based on 1 normalized pattern(s): licensed under the terms of the gnu gpl license version 2 extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 62 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Richard Fontana <rfontana@redhat.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.929121379@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
216 lines
4.8 KiB
C
216 lines
4.8 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* (C) 2010,2011 Thomas Renninger <trenn@suse.de>, Novell Inc.
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*
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* Based on Len Brown's <lenb@kernel.org> turbostat tool.
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*/
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#if defined(__i386__) || defined(__x86_64__)
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#include <stdio.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include "helpers/helpers.h"
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#include "idle_monitor/cpupower-monitor.h"
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#define MSR_PKG_C3_RESIDENCY 0x3F8
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#define MSR_PKG_C6_RESIDENCY 0x3F9
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#define MSR_CORE_C3_RESIDENCY 0x3FC
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#define MSR_CORE_C6_RESIDENCY 0x3FD
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#define MSR_TSC 0x10
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#define NHM_CSTATE_COUNT 4
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enum intel_nhm_id { C3 = 0, C6, PC3, PC6, TSC = 0xFFFF };
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static int nhm_get_count_percent(unsigned int self_id, double *percent,
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unsigned int cpu);
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static cstate_t nhm_cstates[NHM_CSTATE_COUNT] = {
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{
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.name = "C3",
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.desc = N_("Processor Core C3"),
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.id = C3,
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.range = RANGE_CORE,
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.get_count_percent = nhm_get_count_percent,
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},
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{
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.name = "C6",
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.desc = N_("Processor Core C6"),
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.id = C6,
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.range = RANGE_CORE,
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.get_count_percent = nhm_get_count_percent,
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},
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{
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.name = "PC3",
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.desc = N_("Processor Package C3"),
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.id = PC3,
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.range = RANGE_PACKAGE,
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.get_count_percent = nhm_get_count_percent,
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},
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{
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.name = "PC6",
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.desc = N_("Processor Package C6"),
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.id = PC6,
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.range = RANGE_PACKAGE,
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.get_count_percent = nhm_get_count_percent,
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},
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};
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static unsigned long long tsc_at_measure_start;
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static unsigned long long tsc_at_measure_end;
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static unsigned long long *previous_count[NHM_CSTATE_COUNT];
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static unsigned long long *current_count[NHM_CSTATE_COUNT];
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/* valid flag for all CPUs. If a MSR read failed it will be zero */
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static int *is_valid;
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static int nhm_get_count(enum intel_nhm_id id, unsigned long long *val,
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unsigned int cpu)
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{
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int msr;
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switch (id) {
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case C3:
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msr = MSR_CORE_C3_RESIDENCY;
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break;
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case C6:
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msr = MSR_CORE_C6_RESIDENCY;
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break;
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case PC3:
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msr = MSR_PKG_C3_RESIDENCY;
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break;
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case PC6:
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msr = MSR_PKG_C6_RESIDENCY;
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break;
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case TSC:
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msr = MSR_TSC;
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break;
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default:
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return -1;
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};
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if (read_msr(cpu, msr, val))
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return -1;
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return 0;
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}
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static int nhm_get_count_percent(unsigned int id, double *percent,
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unsigned int cpu)
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{
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*percent = 0.0;
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if (!is_valid[cpu])
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return -1;
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*percent = (100.0 *
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(current_count[id][cpu] - previous_count[id][cpu])) /
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(tsc_at_measure_end - tsc_at_measure_start);
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dprint("%s: previous: %llu - current: %llu - (%u)\n",
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nhm_cstates[id].name, previous_count[id][cpu],
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current_count[id][cpu], cpu);
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dprint("%s: tsc_diff: %llu - count_diff: %llu - percent: %2.f (%u)\n",
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nhm_cstates[id].name,
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(unsigned long long) tsc_at_measure_end - tsc_at_measure_start,
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current_count[id][cpu] - previous_count[id][cpu],
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*percent, cpu);
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return 0;
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}
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static int nhm_start(void)
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{
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int num, cpu;
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unsigned long long dbg, val;
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nhm_get_count(TSC, &tsc_at_measure_start, base_cpu);
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for (num = 0; num < NHM_CSTATE_COUNT; num++) {
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for (cpu = 0; cpu < cpu_count; cpu++) {
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is_valid[cpu] = !nhm_get_count(num, &val, cpu);
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previous_count[num][cpu] = val;
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}
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}
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nhm_get_count(TSC, &dbg, base_cpu);
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dprint("TSC diff: %llu\n", dbg - tsc_at_measure_start);
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return 0;
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}
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static int nhm_stop(void)
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{
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unsigned long long val;
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unsigned long long dbg;
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int num, cpu;
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nhm_get_count(TSC, &tsc_at_measure_end, base_cpu);
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for (num = 0; num < NHM_CSTATE_COUNT; num++) {
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for (cpu = 0; cpu < cpu_count; cpu++) {
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is_valid[cpu] = !nhm_get_count(num, &val, cpu);
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current_count[num][cpu] = val;
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}
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}
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nhm_get_count(TSC, &dbg, base_cpu);
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dprint("TSC diff: %llu\n", dbg - tsc_at_measure_end);
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return 0;
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}
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struct cpuidle_monitor intel_nhm_monitor;
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struct cpuidle_monitor *intel_nhm_register(void)
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{
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int num;
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if (cpupower_cpu_info.vendor != X86_VENDOR_INTEL)
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return NULL;
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if (!(cpupower_cpu_info.caps & CPUPOWER_CAP_INV_TSC))
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return NULL;
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if (!(cpupower_cpu_info.caps & CPUPOWER_CAP_APERF))
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return NULL;
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/* Free this at program termination */
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is_valid = calloc(cpu_count, sizeof(int));
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for (num = 0; num < NHM_CSTATE_COUNT; num++) {
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previous_count[num] = calloc(cpu_count,
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sizeof(unsigned long long));
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current_count[num] = calloc(cpu_count,
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sizeof(unsigned long long));
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}
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intel_nhm_monitor.name_len = strlen(intel_nhm_monitor.name);
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return &intel_nhm_monitor;
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}
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void intel_nhm_unregister(void)
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{
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int num;
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for (num = 0; num < NHM_CSTATE_COUNT; num++) {
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free(previous_count[num]);
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free(current_count[num]);
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}
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free(is_valid);
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}
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struct cpuidle_monitor intel_nhm_monitor = {
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.name = "Nehalem",
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.hw_states_num = NHM_CSTATE_COUNT,
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.hw_states = nhm_cstates,
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.start = nhm_start,
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.stop = nhm_stop,
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.do_register = intel_nhm_register,
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.unregister = intel_nhm_unregister,
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.needs_root = 1,
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.overflow_s = 922000000 /* 922337203 seconds TSC overflow
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at 20GHz */
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};
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#endif
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