linux/arch/riscv/mm
Linus Torvalds 97d8894b6f RISC-V Patches for the 6.12 Merge Window, Part 1
* Support for using Zkr to seed KASLR.
 * Support for IPI-triggered CPU backtracing.
 * Support for generic CPU vulnerabilities reporting to userspace.
 * A few cleanups for missing licenses.
 * The size limit on the XIP kernel has been removed.
 * Support for tracing userspace stacks.
 * Support for the Svvptc extension.
 * Various cleanups and fixes throughout the tree.
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Merge tag 'riscv-for-linus-6.12-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V updates from Palmer Dabbelt:

 - Support using Zkr to seed KASLR

 - Support IPI-triggered CPU backtracing

 - Support for generic CPU vulnerabilities reporting to userspace

 - A few cleanups for missing licenses

 - The size limit on the XIP kernel has been removed

 - Support for tracing userspace stacks

 - Support for the Svvptc extension

 - Various cleanups and fixes throughout the tree

* tag 'riscv-for-linus-6.12-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (47 commits)
  crash: Fix riscv64 crash memory reserve dead loop
  perf/riscv-sbi: Add platform specific firmware event handling
  tools: Optimize ring buffer for riscv
  tools: Add riscv barrier implementation
  RISC-V: Don't have MAX_PHYSMEM_BITS exceed phys_addr_t
  ACPI: NUMA: initialize all values of acpi_early_node_map to NUMA_NO_NODE
  riscv: Enable bitops instrumentation
  riscv: Omit optimized string routines when using KASAN
  ACPI: RISCV: Make acpi_numa_get_nid() to be static
  riscv: Randomize lower bits of stack address
  selftests: riscv: Allow mmap test to compile on 32-bit
  riscv: Make riscv_isa_vendor_ext_andes array static
  riscv: Use LIST_HEAD() to simplify code
  riscv: defconfig: Disable RZ/Five peripheral support
  RISC-V: Implement kgdb_roundup_cpus() to enable future NMI Roundup
  riscv: avoid Imbalance in RAS
  riscv: cacheinfo: Add back init_cache_level() function
  riscv: Remove unused _TIF_WORK_MASK
  drivers/perf: riscv: Remove redundant macro check
  riscv: define ILLEGAL_POINTER_VALUE for 64bit
  ...
2024-09-24 10:59:17 -07:00
..
cache-ops.c riscv: split cache ops out of dma-noncoherent.c 2023-11-07 09:37:42 -08:00
cacheflush.c riscv: Disable preemption while handling PR_RISCV_CTX_SW_FENCEI_OFF 2024-09-10 20:38:46 -07:00
context.c Merge patch series "riscv: ASID-related and UP-related TLB flush enhancements" 2024-04-30 10:35:48 -07:00
dma-noncoherent.c dma-mapping: Simplify arch_setup_dma_ops() 2024-04-26 12:07:28 +02:00
extable.c riscv: select DCACHE_WORD_ACCESS for efficient unaligned access HW 2024-01-09 20:18:20 -08:00
fault.c riscv/mm: Add handling for VM_FAULT_SIGSEGV in mm_fault_error() 2024-08-01 07:15:27 -07:00
hugetlbpage.c mm: provide mm_struct and address to huge_ptep_get() 2024-07-12 15:52:15 -07:00
init.c RISC-V Patches for the 6.12 Merge Window, Part 1 2024-09-24 10:59:17 -07:00
kasan_init.c percpu: 2024-01-18 15:01:28 -08:00
Makefile riscv: mm: Combine the SMP and UP TLB flush code 2024-04-29 10:49:29 -07:00
pageattr.c riscv: rewrite __kernel_map_pages() to fix sleeping in invalid context 2024-05-22 09:15:09 -07:00
pgtable.c riscv: Stop emitting preventive sfence.vma for new userspace mappings with Svvptc 2024-09-15 00:11:05 -07:00
physaddr.c riscv: Use PUD/P4D/PGD pages for the linear mapping 2023-04-18 20:43:04 -07:00
pmem.c RISC-V: capitalise CMO op macros 2023-11-05 09:11:23 -08:00
ptdump.c riscv: mm: Take memory hotplug read-lock during kernel page table dump 2024-06-26 08:42:43 -07:00
tlbflush.c RISC-V Patches for the 6.10 Merge Window, Part 1 2024-05-22 09:56:00 -07:00