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07acfc2a93
Pull KVM changes from Avi Kivity: "Changes include additional instruction emulation, page-crossing MMIO, faster dirty logging, preventing the watchdog from killing a stopped guest, module autoload, a new MSI ABI, and some minor optimizations and fixes. Outside x86 we have a small s390 and a very large ppc update. Regarding the new (for kvm) rebaseless workflow, some of the patches that were merged before we switch trees had to be rebased, while others are true pulls. In either case the signoffs should be correct now." Fix up trivial conflicts in Documentation/feature-removal-schedule.txt arch/powerpc/kvm/book3s_segment.S and arch/x86/include/asm/kvm_para.h. I suspect the kvm_para.h resolution ends up doing the "do I have cpuid" check effectively twice (it was done differently in two different commits), but better safe than sorry ;) * 'next' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (125 commits) KVM: make asm-generic/kvm_para.h have an ifdef __KERNEL__ block KVM: s390: onereg for timer related registers KVM: s390: epoch difference and TOD programmable field KVM: s390: KVM_GET/SET_ONEREG for s390 KVM: s390: add capability indicating COW support KVM: Fix mmu_reload() clash with nested vmx event injection KVM: MMU: Don't use RCU for lockless shadow walking KVM: VMX: Optimize %ds, %es reload KVM: VMX: Fix %ds/%es clobber KVM: x86 emulator: convert bsf/bsr instructions to emulate_2op_SrcV_nobyte() KVM: VMX: unlike vmcs on fail path KVM: PPC: Emulator: clean up SPR reads and writes KVM: PPC: Emulator: clean up instruction parsing kvm/powerpc: Add new ioctl to retreive server MMU infos kvm/book3s: Make kernel emulated H_PUT_TCE available for "PR" KVM KVM: PPC: bookehv: Fix r8/r13 storing in level exception handler KVM: PPC: Book3S: Enable IRQs during exit handling KVM: PPC: Fix PR KVM on POWER7 bare metal KVM: PPC: Fix stbux emulation KVM: PPC: bookehv: Use lwz/stw instead of PPC_LL/PPC_STL for 32-bit fields ...
227 lines
5.5 KiB
C
227 lines
5.5 KiB
C
#ifndef _ASM_X86_KVM_PARA_H
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#define _ASM_X86_KVM_PARA_H
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#include <linux/types.h>
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#include <asm/hyperv.h>
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/* This CPUID returns the signature 'KVMKVMKVM' in ebx, ecx, and edx. It
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* should be used to determine that a VM is running under KVM.
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*/
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#define KVM_CPUID_SIGNATURE 0x40000000
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/* This CPUID returns a feature bitmap in eax. Before enabling a particular
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* paravirtualization, the appropriate feature bit should be checked.
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*/
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#define KVM_CPUID_FEATURES 0x40000001
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#define KVM_FEATURE_CLOCKSOURCE 0
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#define KVM_FEATURE_NOP_IO_DELAY 1
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#define KVM_FEATURE_MMU_OP 2
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/* This indicates that the new set of kvmclock msrs
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* are available. The use of 0x11 and 0x12 is deprecated
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*/
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#define KVM_FEATURE_CLOCKSOURCE2 3
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#define KVM_FEATURE_ASYNC_PF 4
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#define KVM_FEATURE_STEAL_TIME 5
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/* The last 8 bits are used to indicate how to interpret the flags field
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* in pvclock structure. If no bits are set, all flags are ignored.
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*/
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#define KVM_FEATURE_CLOCKSOURCE_STABLE_BIT 24
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#define MSR_KVM_WALL_CLOCK 0x11
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#define MSR_KVM_SYSTEM_TIME 0x12
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#define KVM_MSR_ENABLED 1
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/* Custom MSRs falls in the range 0x4b564d00-0x4b564dff */
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#define MSR_KVM_WALL_CLOCK_NEW 0x4b564d00
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#define MSR_KVM_SYSTEM_TIME_NEW 0x4b564d01
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#define MSR_KVM_ASYNC_PF_EN 0x4b564d02
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#define MSR_KVM_STEAL_TIME 0x4b564d03
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struct kvm_steal_time {
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__u64 steal;
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__u32 version;
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__u32 flags;
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__u32 pad[12];
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};
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#define KVM_STEAL_ALIGNMENT_BITS 5
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#define KVM_STEAL_VALID_BITS ((-1ULL << (KVM_STEAL_ALIGNMENT_BITS + 1)))
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#define KVM_STEAL_RESERVED_MASK (((1 << KVM_STEAL_ALIGNMENT_BITS) - 1 ) << 1)
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#define KVM_MAX_MMU_OP_BATCH 32
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#define KVM_ASYNC_PF_ENABLED (1 << 0)
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#define KVM_ASYNC_PF_SEND_ALWAYS (1 << 1)
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/* Operations for KVM_HC_MMU_OP */
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#define KVM_MMU_OP_WRITE_PTE 1
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#define KVM_MMU_OP_FLUSH_TLB 2
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#define KVM_MMU_OP_RELEASE_PT 3
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/* Payload for KVM_HC_MMU_OP */
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struct kvm_mmu_op_header {
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__u32 op;
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__u32 pad;
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};
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struct kvm_mmu_op_write_pte {
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struct kvm_mmu_op_header header;
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__u64 pte_phys;
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__u64 pte_val;
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};
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struct kvm_mmu_op_flush_tlb {
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struct kvm_mmu_op_header header;
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};
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struct kvm_mmu_op_release_pt {
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struct kvm_mmu_op_header header;
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__u64 pt_phys;
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};
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#define KVM_PV_REASON_PAGE_NOT_PRESENT 1
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#define KVM_PV_REASON_PAGE_READY 2
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struct kvm_vcpu_pv_apf_data {
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__u32 reason;
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__u8 pad[60];
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__u32 enabled;
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};
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#ifdef __KERNEL__
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#include <asm/processor.h>
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extern void kvmclock_init(void);
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extern int kvm_register_clock(char *txt);
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#ifdef CONFIG_KVM_CLOCK
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bool kvm_check_and_clear_guest_paused(void);
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#else
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static inline bool kvm_check_and_clear_guest_paused(void)
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{
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return false;
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}
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#endif /* CONFIG_KVMCLOCK */
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/* This instruction is vmcall. On non-VT architectures, it will generate a
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* trap that we will then rewrite to the appropriate instruction.
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*/
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#define KVM_HYPERCALL ".byte 0x0f,0x01,0xc1"
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/* For KVM hypercalls, a three-byte sequence of either the vmrun or the vmmrun
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* instruction. The hypervisor may replace it with something else but only the
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* instructions are guaranteed to be supported.
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*
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* Up to four arguments may be passed in rbx, rcx, rdx, and rsi respectively.
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* The hypercall number should be placed in rax and the return value will be
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* placed in rax. No other registers will be clobbered unless explicited
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* noted by the particular hypercall.
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*/
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static inline long kvm_hypercall0(unsigned int nr)
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{
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long ret;
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asm volatile(KVM_HYPERCALL
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: "=a"(ret)
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: "a"(nr)
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: "memory");
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return ret;
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}
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static inline long kvm_hypercall1(unsigned int nr, unsigned long p1)
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{
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long ret;
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asm volatile(KVM_HYPERCALL
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: "=a"(ret)
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: "a"(nr), "b"(p1)
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: "memory");
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return ret;
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}
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static inline long kvm_hypercall2(unsigned int nr, unsigned long p1,
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unsigned long p2)
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{
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long ret;
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asm volatile(KVM_HYPERCALL
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: "=a"(ret)
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: "a"(nr), "b"(p1), "c"(p2)
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: "memory");
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return ret;
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}
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static inline long kvm_hypercall3(unsigned int nr, unsigned long p1,
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unsigned long p2, unsigned long p3)
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{
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long ret;
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asm volatile(KVM_HYPERCALL
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: "=a"(ret)
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: "a"(nr), "b"(p1), "c"(p2), "d"(p3)
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: "memory");
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return ret;
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}
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static inline long kvm_hypercall4(unsigned int nr, unsigned long p1,
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unsigned long p2, unsigned long p3,
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unsigned long p4)
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{
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long ret;
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asm volatile(KVM_HYPERCALL
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: "=a"(ret)
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: "a"(nr), "b"(p1), "c"(p2), "d"(p3), "S"(p4)
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: "memory");
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return ret;
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}
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static inline int kvm_para_available(void)
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{
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unsigned int eax, ebx, ecx, edx;
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char signature[13];
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if (boot_cpu_data.cpuid_level < 0)
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return 0; /* So we don't blow up on old processors */
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if (cpu_has_hypervisor) {
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cpuid(KVM_CPUID_SIGNATURE, &eax, &ebx, &ecx, &edx);
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memcpy(signature + 0, &ebx, 4);
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memcpy(signature + 4, &ecx, 4);
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memcpy(signature + 8, &edx, 4);
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signature[12] = 0;
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if (strcmp(signature, "KVMKVMKVM") == 0)
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return 1;
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}
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return 0;
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}
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static inline unsigned int kvm_arch_para_features(void)
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{
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return cpuid_eax(KVM_CPUID_FEATURES);
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}
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#ifdef CONFIG_KVM_GUEST
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void __init kvm_guest_init(void);
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void kvm_async_pf_task_wait(u32 token);
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void kvm_async_pf_task_wake(u32 token);
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u32 kvm_read_and_reset_pf_reason(void);
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extern void kvm_disable_steal_time(void);
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#else
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#define kvm_guest_init() do { } while (0)
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#define kvm_async_pf_task_wait(T) do {} while(0)
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#define kvm_async_pf_task_wake(T) do {} while(0)
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static inline u32 kvm_read_and_reset_pf_reason(void)
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{
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return 0;
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}
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static inline void kvm_disable_steal_time(void)
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{
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return;
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}
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#endif
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#endif /* __KERNEL__ */
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#endif /* _ASM_X86_KVM_PARA_H */
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