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b67eb1520b
Based on 1 normalized pattern(s): this driver is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 this driver is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this driver if not see http www gnu org licenses extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 9 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141333.769845457@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
442 lines
12 KiB
C
442 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* card driver for models with CS4398/CS4362A DACs (Xonar D1/DX)
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*
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* Copyright (c) Clemens Ladisch <clemens@ladisch.de>
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*/
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/*
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* Xonar D1/DX
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* -----------
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*
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* CMI8788:
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*
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* I²C <-> CS4398 (addr 1001111) (front)
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* <-> CS4362A (addr 0011000) (surround, center/LFE, back)
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*
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* GPI 0 <- external power present (DX only)
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*
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* GPIO 0 -> enable output to speakers
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* GPIO 1 -> route output to front panel
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* GPIO 2 -> M0 of CS5361
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* GPIO 3 -> M1 of CS5361
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* GPIO 6 -> ?
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* GPIO 7 -> ?
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* GPIO 8 -> route input jack to line-in (0) or mic-in (1)
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*
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* CM9780:
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*
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* LINE_OUT -> input of ADC
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*
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* AUX_IN <- aux
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* MIC_IN <- mic
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* FMIC_IN <- front mic
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*
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* GPO 0 -> route line-in (0) or AC97 output (1) to CS5361 input
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*/
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#include <linux/pci.h>
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#include <linux/delay.h>
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#include <sound/ac97_codec.h>
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#include <sound/control.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/tlv.h>
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#include "xonar.h"
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#include "cm9780.h"
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#include "cs4398.h"
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#include "cs4362a.h"
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#define GPI_EXT_POWER 0x01
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#define GPIO_D1_OUTPUT_ENABLE 0x0001
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#define GPIO_D1_FRONT_PANEL 0x0002
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#define GPIO_D1_MAGIC 0x00c0
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#define GPIO_D1_INPUT_ROUTE 0x0100
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#define I2C_DEVICE_CS4398 0x9e /* 10011, AD1=1, AD0=1, /W=0 */
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#define I2C_DEVICE_CS4362A 0x30 /* 001100, AD0=0, /W=0 */
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struct xonar_cs43xx {
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struct xonar_generic generic;
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u8 cs4398_regs[8];
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u8 cs4362a_regs[15];
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};
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static void cs4398_write(struct oxygen *chip, u8 reg, u8 value)
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{
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struct xonar_cs43xx *data = chip->model_data;
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oxygen_write_i2c(chip, I2C_DEVICE_CS4398, reg, value);
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if (reg < ARRAY_SIZE(data->cs4398_regs))
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data->cs4398_regs[reg] = value;
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}
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static void cs4398_write_cached(struct oxygen *chip, u8 reg, u8 value)
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{
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struct xonar_cs43xx *data = chip->model_data;
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if (value != data->cs4398_regs[reg])
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cs4398_write(chip, reg, value);
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}
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static void cs4362a_write(struct oxygen *chip, u8 reg, u8 value)
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{
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struct xonar_cs43xx *data = chip->model_data;
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oxygen_write_i2c(chip, I2C_DEVICE_CS4362A, reg, value);
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if (reg < ARRAY_SIZE(data->cs4362a_regs))
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data->cs4362a_regs[reg] = value;
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}
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static void cs4362a_write_cached(struct oxygen *chip, u8 reg, u8 value)
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{
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struct xonar_cs43xx *data = chip->model_data;
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if (value != data->cs4362a_regs[reg])
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cs4362a_write(chip, reg, value);
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}
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static void cs43xx_registers_init(struct oxygen *chip)
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{
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struct xonar_cs43xx *data = chip->model_data;
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unsigned int i;
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/* set CPEN (control port mode) and power down */
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cs4398_write(chip, 8, CS4398_CPEN | CS4398_PDN);
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cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
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/* configure */
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cs4398_write(chip, 2, data->cs4398_regs[2]);
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cs4398_write(chip, 3, CS4398_ATAPI_B_R | CS4398_ATAPI_A_L);
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cs4398_write(chip, 4, data->cs4398_regs[4]);
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cs4398_write(chip, 5, data->cs4398_regs[5]);
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cs4398_write(chip, 6, data->cs4398_regs[6]);
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cs4398_write(chip, 7, data->cs4398_regs[7]);
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cs4362a_write(chip, 0x02, CS4362A_DIF_LJUST);
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cs4362a_write(chip, 0x03, CS4362A_MUTEC_6 | CS4362A_AMUTE |
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CS4362A_RMP_UP | CS4362A_ZERO_CROSS | CS4362A_SOFT_RAMP);
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cs4362a_write(chip, 0x04, data->cs4362a_regs[0x04]);
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cs4362a_write(chip, 0x05, 0);
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for (i = 6; i <= 14; ++i)
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cs4362a_write(chip, i, data->cs4362a_regs[i]);
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/* clear power down */
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cs4398_write(chip, 8, CS4398_CPEN);
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cs4362a_write(chip, 0x01, CS4362A_CPEN);
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}
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static void xonar_d1_init(struct oxygen *chip)
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{
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struct xonar_cs43xx *data = chip->model_data;
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data->generic.anti_pop_delay = 800;
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data->generic.output_enable_bit = GPIO_D1_OUTPUT_ENABLE;
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data->cs4398_regs[2] =
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CS4398_FM_SINGLE | CS4398_DEM_NONE | CS4398_DIF_LJUST;
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data->cs4398_regs[4] = CS4398_MUTEP_LOW |
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CS4398_MUTE_B | CS4398_MUTE_A | CS4398_PAMUTE;
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data->cs4398_regs[5] = 60 * 2;
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data->cs4398_regs[6] = 60 * 2;
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data->cs4398_regs[7] = CS4398_RMP_DN | CS4398_RMP_UP |
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CS4398_ZERO_CROSS | CS4398_SOFT_RAMP;
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data->cs4362a_regs[4] = CS4362A_RMP_DN | CS4362A_DEM_NONE;
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data->cs4362a_regs[6] = CS4362A_FM_SINGLE |
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CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
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data->cs4362a_regs[7] = 60 | CS4362A_MUTE;
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data->cs4362a_regs[8] = 60 | CS4362A_MUTE;
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data->cs4362a_regs[9] = data->cs4362a_regs[6];
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data->cs4362a_regs[10] = 60 | CS4362A_MUTE;
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data->cs4362a_regs[11] = 60 | CS4362A_MUTE;
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data->cs4362a_regs[12] = data->cs4362a_regs[6];
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data->cs4362a_regs[13] = 60 | CS4362A_MUTE;
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data->cs4362a_regs[14] = 60 | CS4362A_MUTE;
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oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS,
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OXYGEN_2WIRE_LENGTH_8 |
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OXYGEN_2WIRE_INTERRUPT_MASK |
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OXYGEN_2WIRE_SPEED_FAST);
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cs43xx_registers_init(chip);
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oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
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GPIO_D1_FRONT_PANEL |
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GPIO_D1_MAGIC |
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GPIO_D1_INPUT_ROUTE);
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oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA,
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GPIO_D1_FRONT_PANEL | GPIO_D1_INPUT_ROUTE);
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xonar_init_cs53x1(chip);
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xonar_enable_output(chip);
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snd_component_add(chip->card, "CS4398");
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snd_component_add(chip->card, "CS4362A");
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snd_component_add(chip->card, "CS5361");
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}
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static void xonar_dx_init(struct oxygen *chip)
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{
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struct xonar_cs43xx *data = chip->model_data;
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data->generic.ext_power_reg = OXYGEN_GPI_DATA;
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data->generic.ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK;
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data->generic.ext_power_bit = GPI_EXT_POWER;
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xonar_init_ext_power(chip);
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xonar_d1_init(chip);
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}
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static void xonar_d1_cleanup(struct oxygen *chip)
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{
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xonar_disable_output(chip);
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cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
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oxygen_clear_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC);
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}
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static void xonar_d1_suspend(struct oxygen *chip)
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{
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xonar_d1_cleanup(chip);
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}
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static void xonar_d1_resume(struct oxygen *chip)
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{
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oxygen_set_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC);
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msleep(1);
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cs43xx_registers_init(chip);
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xonar_enable_output(chip);
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}
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static void set_cs43xx_params(struct oxygen *chip,
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struct snd_pcm_hw_params *params)
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{
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struct xonar_cs43xx *data = chip->model_data;
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u8 cs4398_fm, cs4362a_fm;
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if (params_rate(params) <= 50000) {
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cs4398_fm = CS4398_FM_SINGLE;
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cs4362a_fm = CS4362A_FM_SINGLE;
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} else if (params_rate(params) <= 100000) {
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cs4398_fm = CS4398_FM_DOUBLE;
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cs4362a_fm = CS4362A_FM_DOUBLE;
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} else {
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cs4398_fm = CS4398_FM_QUAD;
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cs4362a_fm = CS4362A_FM_QUAD;
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}
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cs4398_fm |= CS4398_DEM_NONE | CS4398_DIF_LJUST;
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cs4398_write_cached(chip, 2, cs4398_fm);
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cs4362a_fm |= data->cs4362a_regs[6] & ~CS4362A_FM_MASK;
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cs4362a_write_cached(chip, 6, cs4362a_fm);
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cs4362a_write_cached(chip, 12, cs4362a_fm);
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cs4362a_fm &= CS4362A_FM_MASK;
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cs4362a_fm |= data->cs4362a_regs[9] & ~CS4362A_FM_MASK;
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cs4362a_write_cached(chip, 9, cs4362a_fm);
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}
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static void update_cs4362a_volumes(struct oxygen *chip)
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{
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unsigned int i;
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u8 mute;
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mute = chip->dac_mute ? CS4362A_MUTE : 0;
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for (i = 0; i < 6; ++i)
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cs4362a_write_cached(chip, 7 + i + i / 2,
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(127 - chip->dac_volume[2 + i]) | mute);
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}
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static void update_cs43xx_volume(struct oxygen *chip)
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{
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cs4398_write_cached(chip, 5, (127 - chip->dac_volume[0]) * 2);
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cs4398_write_cached(chip, 6, (127 - chip->dac_volume[1]) * 2);
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update_cs4362a_volumes(chip);
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}
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static void update_cs43xx_mute(struct oxygen *chip)
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{
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u8 reg;
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reg = CS4398_MUTEP_LOW | CS4398_PAMUTE;
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if (chip->dac_mute)
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reg |= CS4398_MUTE_B | CS4398_MUTE_A;
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cs4398_write_cached(chip, 4, reg);
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update_cs4362a_volumes(chip);
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}
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static void update_cs43xx_center_lfe_mix(struct oxygen *chip, bool mixed)
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{
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struct xonar_cs43xx *data = chip->model_data;
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u8 reg;
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reg = data->cs4362a_regs[9] & ~CS4362A_ATAPI_MASK;
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if (mixed)
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reg |= CS4362A_ATAPI_B_LR | CS4362A_ATAPI_A_LR;
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else
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reg |= CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
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cs4362a_write_cached(chip, 9, reg);
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}
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static const struct snd_kcontrol_new front_panel_switch = {
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.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
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.name = "Front Panel Playback Switch",
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.info = snd_ctl_boolean_mono_info,
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.get = xonar_gpio_bit_switch_get,
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.put = xonar_gpio_bit_switch_put,
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.private_value = GPIO_D1_FRONT_PANEL,
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};
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static int rolloff_info(struct snd_kcontrol *ctl,
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struct snd_ctl_elem_info *info)
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{
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static const char *const names[2] = {
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"Fast Roll-off", "Slow Roll-off"
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};
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return snd_ctl_enum_info(info, 1, 2, names);
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}
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static int rolloff_get(struct snd_kcontrol *ctl,
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struct snd_ctl_elem_value *value)
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{
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struct oxygen *chip = ctl->private_data;
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struct xonar_cs43xx *data = chip->model_data;
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value->value.enumerated.item[0] =
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(data->cs4398_regs[7] & CS4398_FILT_SEL) != 0;
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return 0;
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}
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static int rolloff_put(struct snd_kcontrol *ctl,
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struct snd_ctl_elem_value *value)
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{
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struct oxygen *chip = ctl->private_data;
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struct xonar_cs43xx *data = chip->model_data;
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int changed;
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u8 reg;
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mutex_lock(&chip->mutex);
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reg = data->cs4398_regs[7];
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if (value->value.enumerated.item[0])
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reg |= CS4398_FILT_SEL;
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else
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reg &= ~CS4398_FILT_SEL;
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changed = reg != data->cs4398_regs[7];
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if (changed) {
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cs4398_write(chip, 7, reg);
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if (reg & CS4398_FILT_SEL)
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reg = data->cs4362a_regs[0x04] | CS4362A_FILT_SEL;
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else
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reg = data->cs4362a_regs[0x04] & ~CS4362A_FILT_SEL;
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cs4362a_write(chip, 0x04, reg);
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}
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mutex_unlock(&chip->mutex);
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return changed;
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}
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static const struct snd_kcontrol_new rolloff_control = {
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.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
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.name = "DAC Filter Playback Enum",
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.info = rolloff_info,
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.get = rolloff_get,
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.put = rolloff_put,
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};
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static void xonar_d1_line_mic_ac97_switch(struct oxygen *chip,
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unsigned int reg, unsigned int mute)
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{
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if (reg == AC97_LINE) {
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spin_lock_irq(&chip->reg_lock);
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oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
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mute ? GPIO_D1_INPUT_ROUTE : 0,
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GPIO_D1_INPUT_ROUTE);
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spin_unlock_irq(&chip->reg_lock);
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}
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}
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static const DECLARE_TLV_DB_SCALE(cs4362a_db_scale, -6000, 100, 0);
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static int xonar_d1_mixer_init(struct oxygen *chip)
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{
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int err;
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err = snd_ctl_add(chip->card, snd_ctl_new1(&front_panel_switch, chip));
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if (err < 0)
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return err;
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err = snd_ctl_add(chip->card, snd_ctl_new1(&rolloff_control, chip));
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if (err < 0)
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return err;
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return 0;
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}
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static void dump_cs4362a_registers(struct xonar_cs43xx *data,
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struct snd_info_buffer *buffer)
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{
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unsigned int i;
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snd_iprintf(buffer, "\nCS4362A:");
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for (i = 1; i <= 14; ++i)
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snd_iprintf(buffer, " %02x", data->cs4362a_regs[i]);
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snd_iprintf(buffer, "\n");
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}
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static void dump_d1_registers(struct oxygen *chip,
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struct snd_info_buffer *buffer)
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{
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struct xonar_cs43xx *data = chip->model_data;
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unsigned int i;
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snd_iprintf(buffer, "\nCS4398: 7?");
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for (i = 2; i < 8; ++i)
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snd_iprintf(buffer, " %02x", data->cs4398_regs[i]);
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snd_iprintf(buffer, "\n");
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dump_cs4362a_registers(data, buffer);
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}
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static const struct oxygen_model model_xonar_d1 = {
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.longname = "Asus Virtuoso 100",
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.chip = "AV200",
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.init = xonar_d1_init,
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.mixer_init = xonar_d1_mixer_init,
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.cleanup = xonar_d1_cleanup,
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.suspend = xonar_d1_suspend,
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.resume = xonar_d1_resume,
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.set_dac_params = set_cs43xx_params,
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.set_adc_params = xonar_set_cs53x1_params,
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.update_dac_volume = update_cs43xx_volume,
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.update_dac_mute = update_cs43xx_mute,
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.update_center_lfe_mix = update_cs43xx_center_lfe_mix,
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.ac97_switch = xonar_d1_line_mic_ac97_switch,
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.dump_registers = dump_d1_registers,
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.dac_tlv = cs4362a_db_scale,
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.model_data_size = sizeof(struct xonar_cs43xx),
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.device_config = PLAYBACK_0_TO_I2S |
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PLAYBACK_1_TO_SPDIF |
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CAPTURE_0_FROM_I2S_2 |
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CAPTURE_1_FROM_SPDIF |
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AC97_FMIC_SWITCH,
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.dac_channels_pcm = 8,
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.dac_channels_mixer = 8,
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.dac_volume_min = 127 - 60,
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.dac_volume_max = 127,
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.function_flags = OXYGEN_FUNCTION_2WIRE,
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.dac_mclks = OXYGEN_MCLKS(256, 128, 128),
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.adc_mclks = OXYGEN_MCLKS(256, 128, 128),
|
|
.dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
|
|
.adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
|
|
};
|
|
|
|
int get_xonar_cs43xx_model(struct oxygen *chip,
|
|
const struct pci_device_id *id)
|
|
{
|
|
switch (id->subdevice) {
|
|
case 0x834f:
|
|
chip->model = model_xonar_d1;
|
|
chip->model.shortname = "Xonar D1";
|
|
break;
|
|
case 0x8275:
|
|
case 0x8327:
|
|
chip->model = model_xonar_d1;
|
|
chip->model.shortname = "Xonar DX";
|
|
chip->model.init = xonar_dx_init;
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
return 0;
|
|
}
|