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Following is a brief description of the PAMU hardware: PAMU determines what action to take and whether to authorize the action on the basis of the memory address, a Logical IO Device Number (LIODN), and PAACT table (logically) indexed by LIODN and address. Hardware devices which need to access memory must provide an LIODN in addition to the memory address. Peripheral Access Authorization and Control Tables (PAACTs) are the primary data structures used by PAMU. A PAACT is a table of peripheral access authorization and control entries (PAACE).Each PAACE defines the range of I/O bus address space that is accessible by the LIOD and the associated access capabilities. There are two types of PAACTs: primary PAACT (PPAACT) and secondary PAACT (SPAACT).A given physical I/O device may be able to act as one or more independent logical I/O devices (LIODs). Each such logical I/O device is assigned an identifier called logical I/O device number (LIODN). A LIODN is allocated a contiguous portion of the I/O bus address space called the DSA window for performing DSA operations. The DSA window may optionally be divided into multiple sub-windows, each of which may be used to map to a region in system storage space. The first sub-window is referred to as the primary sub-window and the remaining are called secondary sub-windows. This patch provides the PAMU driver (fsl_pamu.c) and the corresponding IOMMU API implementation (fsl_pamu_domain.c). The PAMU hardware driver (fsl_pamu.c) has been derived from the work done by Ashish Kalra and Timur Tabi. [For iommu group support] Acked-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Timur Tabi <timur@tabi.org> Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
86 lines
2.6 KiB
C
86 lines
2.6 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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* Copyright (C) 2013 Freescale Semiconductor, Inc.
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*
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*/
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#ifndef __FSL_PAMU_DOMAIN_H
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#define __FSL_PAMU_DOMAIN_H
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#include "fsl_pamu.h"
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struct dma_window {
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phys_addr_t paddr;
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u64 size;
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int valid;
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int prot;
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};
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struct fsl_dma_domain {
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/*
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* Indicates the geometry size for the domain.
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* This would be set when the geometry is
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* configured for the domain.
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*/
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dma_addr_t geom_size;
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/*
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* Number of windows assocaited with this domain.
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* During domain initialization, it is set to the
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* the maximum number of subwindows allowed for a LIODN.
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* Minimum value for this is 1 indicating a single PAMU
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* window, without any sub windows. Value can be set/
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* queried by set_attr/get_attr API for DOMAIN_ATTR_WINDOWS.
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* Value can only be set once the geometry has been configured.
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*/
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u32 win_cnt;
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/*
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* win_arr contains information of the configured
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* windows for a domain. This is allocated only
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* when the number of windows for the domain are
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* set.
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*/
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struct dma_window *win_arr;
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/* list of devices associated with the domain */
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struct list_head devices;
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/* dma_domain states:
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* mapped - A particular mapping has been created
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* within the configured geometry.
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* enabled - DMA has been enabled for the given
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* domain. This translates to setting of the
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* valid bit for the primary PAACE in the PAMU
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* PAACT table. Domain geometry should be set and
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* it must have a valid mapping before DMA can be
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* enabled for it.
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*
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*/
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int mapped;
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int enabled;
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/* stash_id obtained from the stash attribute details */
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u32 stash_id;
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struct pamu_stash_attribute dma_stash;
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u32 snoop_id;
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struct iommu_domain *iommu_domain;
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spinlock_t domain_lock;
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};
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/* domain-device relationship */
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struct device_domain_info {
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struct list_head link; /* link to domain siblings */
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struct device *dev;
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u32 liodn;
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struct fsl_dma_domain *domain; /* pointer to domain */
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};
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#endif /* __FSL_PAMU_DOMAIN_H */
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