Arnd Bergmann e7ada8dfd5 arm: Xilinx Zynq patches for v4.6 ... - SLCR early init - Fix L2 cache data corruption - Fix early printk uart setting -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEABECAAYFAlbO/kIACgkQykllyylKDCE55wCdEI40Q6+gUEa4ZEH2Pkl2LqK7 e/oAn23veiR4MaMZb3jKVLp1Lzt83x1B =qI6y -----END PGP SIGNATURE----- Merge tag 'zynq-soc-for-4.6' of https://github.com/Xilinx/linux-xlnx into next/soc Merge "ARM: Xilinx Zynq patches for v4.6" from Michal Simek: - SLCR early init - Fix L2 cache data corruption - Fix early printk uart setting * tag 'zynq-soc-for-4.6' of https://github.com/Xilinx/linux-xlnx: ARM: zynq: Move early printk virtual address to vmalloc area ARM: zynq: address L2 cache data corruption ARM: zynq: initialize slcr mapping earlier		2016-02-26 22:54:53 +01:00
..
asm	Merge branch 'akpm' (patches from Andrew)	2016-01-21 12:32:08 -08:00
debug	arm: Xilinx Zynq patches for v4.6	2016-02-26 22:54:53 +01:00
uapi/asm	ARM: wire up copy_file_range() syscall	2016-01-27 18:14:46 +00:00