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5ab43d0f86
Add a driver for PHY interface built into USB3 controller implemented in UniPhier SoCs. This driver supports High-Speed PHY and Super-Speed PHY. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Motoya Tanigawa <tanigawa.motoya@socionext.com> Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
28 lines
750 B
Makefile
28 lines
750 B
Makefile
# SPDX-License-Identifier: GPL-2.0
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#
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# Makefile for the phy drivers.
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#
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obj-$(CONFIG_GENERIC_PHY) += phy-core.o
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obj-$(CONFIG_PHY_LPC18XX_USB_OTG) += phy-lpc18xx-usb-otg.o
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obj-$(CONFIG_PHY_XGENE) += phy-xgene.o
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obj-$(CONFIG_PHY_PISTACHIO_USB) += phy-pistachio-usb.o
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obj-$(CONFIG_ARCH_SUNXI) += allwinner/
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obj-$(CONFIG_ARCH_MESON) += amlogic/
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obj-$(CONFIG_LANTIQ) += lantiq/
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obj-$(CONFIG_ARCH_MEDIATEK) += mediatek/
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obj-$(CONFIG_ARCH_RENESAS) += renesas/
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obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
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obj-$(CONFIG_ARCH_TEGRA) += tegra/
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obj-y += broadcom/ \
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cadence/ \
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hisilicon/ \
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marvell/ \
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motorola/ \
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qualcomm/ \
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ralink/ \
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samsung/ \
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socionext/ \
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st/ \
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ti/
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