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184cd4a3b9
This adds support for p7IOC (and possibly other IODA v1 IO Hubs) using OPAL v2 interfaces. We completely take over resource assignment and assign them using an algorithm that hands out device BARs in a way that makes them fit in individual segments of the M32 window of the bridge, which enables us to assign individual PEs to devices and functions. The current implementation gives out a PE per functions on PCIe, and a PE for the entire bridge for PCIe to PCI-X bridges. This can be adjusted / fine tuned later. We also setup DMA resources (32-bit only for now) and MSIs (both 32-bit and 64-bit MSI are supported). The DMA allocation tries to divide the available 256M segments of the 32-bit DMA address space "fairly" among PEs. This is done using a "weight" heuristic which assigns less value to things like OHCI USB controllers than, for example SCSI RAID controllers. This algorithm will probably want some fine tuning for specific devices or device types. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
166 lines
4.8 KiB
C
166 lines
4.8 KiB
C
/*
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* pci_dn.c
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*
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* Copyright (C) 2001 Todd Inglett, IBM Corporation
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*
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* PCI manipulation via device_nodes.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/string.h>
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#include <linux/export.h>
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#include <linux/init.h>
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#include <linux/gfp.h>
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#include <asm/io.h>
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#include <asm/prom.h>
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#include <asm/pci-bridge.h>
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#include <asm/ppc-pci.h>
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#include <asm/firmware.h>
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/*
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* Traverse_func that inits the PCI fields of the device node.
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* NOTE: this *must* be done before read/write config to the device.
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*/
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void * __devinit update_dn_pci_info(struct device_node *dn, void *data)
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{
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struct pci_controller *phb = data;
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const int *type =
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of_get_property(dn, "ibm,pci-config-space-type", NULL);
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const u32 *regs;
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struct pci_dn *pdn;
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pdn = zalloc_maybe_bootmem(sizeof(*pdn), GFP_KERNEL);
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if (pdn == NULL)
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return NULL;
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dn->data = pdn;
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pdn->node = dn;
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pdn->phb = phb;
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#ifdef CONFIG_PPC_POWERNV
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pdn->pe_number = IODA_INVALID_PE;
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#endif
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regs = of_get_property(dn, "reg", NULL);
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if (regs) {
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/* First register entry is addr (00BBSS00) */
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pdn->busno = (regs[0] >> 16) & 0xff;
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pdn->devfn = (regs[0] >> 8) & 0xff;
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}
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pdn->pci_ext_config_space = (type && *type == 1);
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return NULL;
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}
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/*
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* Traverse a device tree stopping each PCI device in the tree.
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* This is done depth first. As each node is processed, a "pre"
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* function is called and the children are processed recursively.
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*
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* The "pre" func returns a value. If non-zero is returned from
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* the "pre" func, the traversal stops and this value is returned.
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* This return value is useful when using traverse as a method of
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* finding a device.
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*
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* NOTE: we do not run the func for devices that do not appear to
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* be PCI except for the start node which we assume (this is good
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* because the start node is often a phb which may be missing PCI
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* properties).
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* We use the class-code as an indicator. If we run into
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* one of these nodes we also assume its siblings are non-pci for
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* performance.
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*/
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void *traverse_pci_devices(struct device_node *start, traverse_func pre,
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void *data)
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{
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struct device_node *dn, *nextdn;
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void *ret;
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/* We started with a phb, iterate all childs */
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for (dn = start->child; dn; dn = nextdn) {
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const u32 *classp;
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u32 class;
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nextdn = NULL;
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classp = of_get_property(dn, "class-code", NULL);
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class = classp ? *classp : 0;
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if (pre && ((ret = pre(dn, data)) != NULL))
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return ret;
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/* If we are a PCI bridge, go down */
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if (dn->child && ((class >> 8) == PCI_CLASS_BRIDGE_PCI ||
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(class >> 8) == PCI_CLASS_BRIDGE_CARDBUS))
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/* Depth first...do children */
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nextdn = dn->child;
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else if (dn->sibling)
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/* ok, try next sibling instead. */
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nextdn = dn->sibling;
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if (!nextdn) {
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/* Walk up to next valid sibling. */
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do {
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dn = dn->parent;
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if (dn == start)
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return NULL;
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} while (dn->sibling == NULL);
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nextdn = dn->sibling;
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}
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}
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return NULL;
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}
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/**
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* pci_devs_phb_init_dynamic - setup pci devices under this PHB
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* phb: pci-to-host bridge (top-level bridge connecting to cpu)
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*
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* This routine is called both during boot, (before the memory
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* subsystem is set up, before kmalloc is valid) and during the
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* dynamic lpar operation of adding a PHB to a running system.
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*/
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void __devinit pci_devs_phb_init_dynamic(struct pci_controller *phb)
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{
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struct device_node *dn = phb->dn;
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struct pci_dn *pdn;
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/* PHB nodes themselves must not match */
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update_dn_pci_info(dn, phb);
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pdn = dn->data;
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if (pdn) {
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pdn->devfn = pdn->busno = -1;
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pdn->phb = phb;
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}
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/* Update dn->phb ptrs for new phb and children devices */
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traverse_pci_devices(dn, update_dn_pci_info, phb);
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}
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/**
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* pci_devs_phb_init - Initialize phbs and pci devs under them.
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*
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* This routine walks over all phb's (pci-host bridges) on the
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* system, and sets up assorted pci-related structures
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* (including pci info in the device node structs) for each
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* pci device found underneath. This routine runs once,
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* early in the boot sequence.
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*/
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void __init pci_devs_phb_init(void)
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{
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struct pci_controller *phb, *tmp;
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/* This must be done first so the device nodes have valid pci info! */
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list_for_each_entry_safe(phb, tmp, &hose_list, list_node)
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pci_devs_phb_init_dynamic(phb);
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}
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