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64436ff667
vf610 has two ADC controllers, and vf610-twr board ADC0_SE5 pin connect to sliding rheostat for ADC test, other ADC pins connect to connectors for future use. Add support for ADC0_SE5. CC: Jonathan Cameron <jic23@kernel.org> CC: Mark Rutland <mark.rutland@arm.com> CC: Otavio Salvador <otavio@ossystems.com.br> CC: Peter Meerwald <pmeerw@pmeerw.net> CC: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
230 lines
4.8 KiB
Plaintext
230 lines
4.8 KiB
Plaintext
/*
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* Copyright 2013 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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/dts-v1/;
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#include "vf610.dtsi"
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/ {
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model = "VF610 Tower Board";
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compatible = "fsl,vf610-twr", "fsl,vf610";
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chosen {
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bootargs = "console=ttyLP1,115200";
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};
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memory {
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reg = <0x80000000 0x8000000>;
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};
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clocks {
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audio_ext {
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compatible = "fixed-clock";
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clock-frequency = <24576000>;
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};
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enet_ext {
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compatible = "fixed-clock";
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clock-frequency = <50000000>;
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};
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};
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regulators {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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reg_3p3v: regulator@0 {
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compatible = "regulator-fixed";
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reg = <0>;
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regulator-name = "3P3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_vcc_3v3_mcu: regulator@1 {
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compatible = "regulator-fixed";
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reg = <1>;
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regulator-name = "vcc_3v3_mcu";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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};
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sound {
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compatible = "simple-audio-card";
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simple-audio-card,format = "i2s";
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simple-audio-card,widgets =
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"Microphone", "Microphone Jack",
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"Headphone", "Headphone Jack",
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"Speaker", "Speaker Ext",
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"Line", "Line In Jack";
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simple-audio-card,routing =
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"MIC_IN", "Microphone Jack",
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"Microphone Jack", "Mic Bias",
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"LINE_IN", "Line In Jack",
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"Headphone Jack", "HP_OUT",
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"Speaker Ext", "LINE_OUT";
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simple-audio-card,cpu {
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sound-dai = <&sai2>;
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master-clkdir-out;
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frame-master;
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bitclock-master;
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};
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simple-audio-card,codec {
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sound-dai = <&codec>;
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frame-master;
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bitclock-master;
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};
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};
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};
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&adc0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_adc0_ad5>;
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vref-supply = <®_vcc_3v3_mcu>;
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status = "okay";
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};
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&dspi0 {
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bus-num = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_dspi0>;
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status = "okay";
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sflash: at26df081a@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "atmel,at26df081a";
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spi-max-frequency = <16000000>;
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spi-cpol;
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spi-cpha;
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reg = <0>;
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};
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};
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&fec0 {
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phy-mode = "rmii";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec0>;
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status = "okay";
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};
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&fec1 {
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phy-mode = "rmii";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec1>;
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status = "okay";
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};
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&i2c0 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c0>;
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status = "okay";
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codec: sgtl5000@0a {
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#sound-dai-cells = <0>;
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compatible = "fsl,sgtl5000";
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reg = <0x0a>;
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VDDA-supply = <®_3p3v>;
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VDDIO-supply = <®_3p3v>;
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clocks = <&clks VF610_CLK_SAI2>;
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};
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};
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&iomuxc {
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vf610-twr {
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pinctrl_adc0_ad5: adc0ad5grp {
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fsl,pins = <
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VF610_PAD_PTC30__ADC0_SE5 0xa1
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>;
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};
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pinctrl_dspi0: dspi0grp {
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fsl,pins = <
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VF610_PAD_PTB19__DSPI0_CS0 0x1182
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VF610_PAD_PTB20__DSPI0_SIN 0x1181
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VF610_PAD_PTB21__DSPI0_SOUT 0x1182
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VF610_PAD_PTB22__DSPI0_SCK 0x1182
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>;
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};
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pinctrl_fec0: fec0grp {
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fsl,pins = <
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VF610_PAD_PTA6__RMII_CLKIN 0x30d1
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VF610_PAD_PTC0__ENET_RMII0_MDC 0x30d3
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VF610_PAD_PTC1__ENET_RMII0_MDIO 0x30d1
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VF610_PAD_PTC2__ENET_RMII0_CRS 0x30d1
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VF610_PAD_PTC3__ENET_RMII0_RXD1 0x30d1
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VF610_PAD_PTC4__ENET_RMII0_RXD0 0x30d1
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VF610_PAD_PTC5__ENET_RMII0_RXER 0x30d1
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VF610_PAD_PTC6__ENET_RMII0_TXD1 0x30d2
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VF610_PAD_PTC7__ENET_RMII0_TXD0 0x30d2
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VF610_PAD_PTC8__ENET_RMII0_TXEN 0x30d2
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>;
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};
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pinctrl_fec1: fec1grp {
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fsl,pins = <
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VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2
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VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3
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VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1
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VF610_PAD_PTC12__ENET_RMII_RXD1 0x30d1
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VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1
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VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1
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VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2
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VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30d2
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VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30d2
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>;
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};
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pinctrl_i2c0: i2c0grp {
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fsl,pins = <
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VF610_PAD_PTB14__I2C0_SCL 0x30d3
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VF610_PAD_PTB15__I2C0_SDA 0x30d3
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>;
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};
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pinctrl_sai2: sai2grp {
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fsl,pins = <
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VF610_PAD_PTA16__SAI2_TX_BCLK 0x02ed
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VF610_PAD_PTA18__SAI2_TX_DATA 0x02ee
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VF610_PAD_PTA19__SAI2_TX_SYNC 0x02ed
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VF610_PAD_PTA21__SAI2_RX_BCLK 0x02ed
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VF610_PAD_PTA22__SAI2_RX_DATA 0x02ed
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VF610_PAD_PTA23__SAI2_RX_SYNC 0x02ed
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VF610_PAD_PTB18__EXT_AUDIO_MCLK 0x02ed
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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VF610_PAD_PTB4__UART1_TX 0x21a2
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VF610_PAD_PTB5__UART1_RX 0x21a1
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>;
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};
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};
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};
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&sai2 {
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#sound-dai-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sai2>;
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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