mirror of
https://github.com/torvalds/linux.git
synced 2024-12-26 21:02:19 +00:00
78c22449f2
This patch Adds the new compatible string for ZynqMP SoC. Signed-off-by: Nava kishore Manne <navam@xilinx.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
23 lines
746 B
Plaintext
23 lines
746 B
Plaintext
Binding for Cadence UART Controller
|
|
|
|
Required properties:
|
|
- compatible :
|
|
Use "xlnx,xuartps","cdns,uart-r1p8" for Zynq-7xxx SoC.
|
|
Use "xlnx,zynqmp-uart","cdns,uart-r1p12" for Zynq Ultrascale+ MPSoC.
|
|
- reg: Should contain UART controller registers location and length.
|
|
- interrupts: Should contain UART controller interrupts.
|
|
- clocks: Must contain phandles to the UART clocks
|
|
See ../clocks/clock-bindings.txt for details.
|
|
- clock-names: Tuple to identify input clocks, must contain "uart_clk" and "pclk"
|
|
See ../clocks/clock-bindings.txt for details.
|
|
|
|
|
|
Example:
|
|
uart@e0000000 {
|
|
compatible = "cdns,uart-r1p8";
|
|
clocks = <&clkc 23>, <&clkc 40>;
|
|
clock-names = "uart_clk", "pclk";
|
|
reg = <0xE0000000 0x1000>;
|
|
interrupts = <0 27 4>;
|
|
};
|