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3b73cfe559
Like other fixes, convert the tasklet to a threaded irq and replace spinlock with mutex appropriately. ak4117_lock remains as spinlock since it's called in another spinlock context from ak4117 driver. Signed-off-by: Takashi Iwai <tiwai@suse.de>
297 lines
9.1 KiB
C
297 lines
9.1 KiB
C
/*
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* Driver for Sound Core PDAudioCF soundcard
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*
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* Copyright (c) 2003 by Jaroslav Kysela <perex@perex.cz>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <sound/core.h>
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#include <sound/info.h>
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#include "pdaudiocf.h"
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#include <sound/initval.h>
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/*
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*
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*/
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static unsigned char pdacf_ak4117_read(void *private_data, unsigned char reg)
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{
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struct snd_pdacf *chip = private_data;
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unsigned long timeout;
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unsigned long flags;
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unsigned char res;
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spin_lock_irqsave(&chip->ak4117_lock, flags);
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timeout = 1000;
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while (pdacf_reg_read(chip, PDAUDIOCF_REG_SCR) & PDAUDIOCF_AK_SBP) {
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udelay(5);
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if (--timeout == 0) {
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spin_unlock_irqrestore(&chip->ak4117_lock, flags);
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snd_printk(KERN_ERR "AK4117 ready timeout (read)\n");
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return 0;
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}
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}
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pdacf_reg_write(chip, PDAUDIOCF_REG_AK_IFR, (u16)reg << 8);
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timeout = 1000;
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while (pdacf_reg_read(chip, PDAUDIOCF_REG_SCR) & PDAUDIOCF_AK_SBP) {
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udelay(5);
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if (--timeout == 0) {
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spin_unlock_irqrestore(&chip->ak4117_lock, flags);
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snd_printk(KERN_ERR "AK4117 read timeout (read2)\n");
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return 0;
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}
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}
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res = (unsigned char)pdacf_reg_read(chip, PDAUDIOCF_REG_AK_IFR);
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spin_unlock_irqrestore(&chip->ak4117_lock, flags);
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return res;
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}
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static void pdacf_ak4117_write(void *private_data, unsigned char reg, unsigned char val)
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{
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struct snd_pdacf *chip = private_data;
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unsigned long timeout;
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unsigned long flags;
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spin_lock_irqsave(&chip->ak4117_lock, flags);
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timeout = 1000;
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while (inw(chip->port + PDAUDIOCF_REG_SCR) & PDAUDIOCF_AK_SBP) {
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udelay(5);
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if (--timeout == 0) {
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spin_unlock_irqrestore(&chip->ak4117_lock, flags);
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snd_printk(KERN_ERR "AK4117 ready timeout (write)\n");
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return;
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}
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}
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outw((u16)reg << 8 | val | (1<<13), chip->port + PDAUDIOCF_REG_AK_IFR);
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spin_unlock_irqrestore(&chip->ak4117_lock, flags);
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}
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#if 0
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void pdacf_dump(struct snd_pdacf *chip)
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{
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printk(KERN_DEBUG "PDAUDIOCF DUMP (0x%lx):\n", chip->port);
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printk(KERN_DEBUG "WPD : 0x%x\n",
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inw(chip->port + PDAUDIOCF_REG_WDP));
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printk(KERN_DEBUG "RDP : 0x%x\n",
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inw(chip->port + PDAUDIOCF_REG_RDP));
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printk(KERN_DEBUG "TCR : 0x%x\n",
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inw(chip->port + PDAUDIOCF_REG_TCR));
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printk(KERN_DEBUG "SCR : 0x%x\n",
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inw(chip->port + PDAUDIOCF_REG_SCR));
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printk(KERN_DEBUG "ISR : 0x%x\n",
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inw(chip->port + PDAUDIOCF_REG_ISR));
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printk(KERN_DEBUG "IER : 0x%x\n",
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inw(chip->port + PDAUDIOCF_REG_IER));
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printk(KERN_DEBUG "AK_IFR : 0x%x\n",
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inw(chip->port + PDAUDIOCF_REG_AK_IFR));
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}
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#endif
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static int pdacf_reset(struct snd_pdacf *chip, int powerdown)
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{
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u16 val;
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val = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR);
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val |= PDAUDIOCF_PDN;
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val &= ~PDAUDIOCF_RECORD; /* for sure */
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pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val);
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udelay(5);
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val |= PDAUDIOCF_RST;
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pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val);
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udelay(200);
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val &= ~PDAUDIOCF_RST;
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pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val);
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udelay(5);
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if (!powerdown) {
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val &= ~PDAUDIOCF_PDN;
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pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val);
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udelay(200);
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}
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return 0;
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}
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void pdacf_reinit(struct snd_pdacf *chip, int resume)
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{
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pdacf_reset(chip, 0);
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if (resume)
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pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, chip->suspend_reg_scr);
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snd_ak4117_reinit(chip->ak4117);
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pdacf_reg_write(chip, PDAUDIOCF_REG_TCR, chip->regmap[PDAUDIOCF_REG_TCR>>1]);
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pdacf_reg_write(chip, PDAUDIOCF_REG_IER, chip->regmap[PDAUDIOCF_REG_IER>>1]);
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}
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static void pdacf_proc_read(struct snd_info_entry * entry,
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struct snd_info_buffer *buffer)
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{
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struct snd_pdacf *chip = entry->private_data;
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u16 tmp;
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snd_iprintf(buffer, "PDAudioCF\n\n");
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tmp = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR);
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snd_iprintf(buffer, "FPGA revision : 0x%x\n", PDAUDIOCF_FPGAREV(tmp));
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}
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static void pdacf_proc_init(struct snd_pdacf *chip)
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{
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struct snd_info_entry *entry;
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if (! snd_card_proc_new(chip->card, "pdaudiocf", &entry))
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snd_info_set_text_ops(entry, chip, pdacf_proc_read);
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}
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struct snd_pdacf *snd_pdacf_create(struct snd_card *card)
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{
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struct snd_pdacf *chip;
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chip = kzalloc(sizeof(*chip), GFP_KERNEL);
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if (chip == NULL)
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return NULL;
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chip->card = card;
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mutex_init(&chip->reg_lock);
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spin_lock_init(&chip->ak4117_lock);
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card->private_data = chip;
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pdacf_proc_init(chip);
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return chip;
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}
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static void snd_pdacf_ak4117_change(struct ak4117 *ak4117, unsigned char c0, unsigned char c1)
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{
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struct snd_pdacf *chip = ak4117->change_callback_private;
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u16 val;
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if (!(c0 & AK4117_UNLCK))
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return;
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mutex_lock(&chip->reg_lock);
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val = chip->regmap[PDAUDIOCF_REG_SCR>>1];
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if (ak4117->rcs0 & AK4117_UNLCK)
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val |= PDAUDIOCF_BLUE_LED_OFF;
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else
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val &= ~PDAUDIOCF_BLUE_LED_OFF;
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pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val);
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mutex_unlock(&chip->reg_lock);
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}
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int snd_pdacf_ak4117_create(struct snd_pdacf *chip)
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{
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int err;
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u16 val;
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/* design note: if we unmask PLL unlock, parity, valid, audio or auto bit interrupts */
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/* from AK4117 then INT1 pin from AK4117 will be high all time, because PCMCIA interrupts are */
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/* egde based and FPGA does logical OR for all interrupt sources, we cannot use these */
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/* high-rate sources */
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static unsigned char pgm[5] = {
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AK4117_XTL_24_576M | AK4117_EXCT, /* AK4117_REG_PWRDN */
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AK4117_CM_PLL_XTAL | AK4117_PKCS_128fs | AK4117_XCKS_128fs, /* AK4117_REQ_CLOCK */
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AK4117_EFH_1024LRCLK | AK4117_DIF_24R | AK4117_IPS, /* AK4117_REG_IO */
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0xff, /* AK4117_REG_INT0_MASK */
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AK4117_MAUTO | AK4117_MAUD | AK4117_MULK | AK4117_MPAR | AK4117_MV, /* AK4117_REG_INT1_MASK */
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};
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err = pdacf_reset(chip, 0);
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if (err < 0)
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return err;
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err = snd_ak4117_create(chip->card, pdacf_ak4117_read, pdacf_ak4117_write, pgm, chip, &chip->ak4117);
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if (err < 0)
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return err;
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val = pdacf_reg_read(chip, PDAUDIOCF_REG_TCR);
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#if 1 /* normal operation */
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val &= ~(PDAUDIOCF_ELIMAKMBIT|PDAUDIOCF_TESTDATASEL);
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#else /* debug */
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val |= PDAUDIOCF_ELIMAKMBIT;
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val &= ~PDAUDIOCF_TESTDATASEL;
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#endif
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pdacf_reg_write(chip, PDAUDIOCF_REG_TCR, val);
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/* setup the FPGA to match AK4117 setup */
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val = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR);
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val &= ~(PDAUDIOCF_CLKDIV0 | PDAUDIOCF_CLKDIV1); /* use 24.576Mhz clock */
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val &= ~(PDAUDIOCF_RED_LED_OFF|PDAUDIOCF_BLUE_LED_OFF);
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val |= PDAUDIOCF_DATAFMT0 | PDAUDIOCF_DATAFMT1; /* 24-bit data */
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pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val);
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/* setup LEDs and IRQ */
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val = pdacf_reg_read(chip, PDAUDIOCF_REG_IER);
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val &= ~(PDAUDIOCF_IRQLVLEN0 | PDAUDIOCF_IRQLVLEN1);
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val &= ~(PDAUDIOCF_BLUEDUTY0 | PDAUDIOCF_REDDUTY0 | PDAUDIOCF_REDDUTY1);
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val |= PDAUDIOCF_BLUEDUTY1 | PDAUDIOCF_HALFRATE;
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val |= PDAUDIOCF_IRQOVREN | PDAUDIOCF_IRQAKMEN;
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pdacf_reg_write(chip, PDAUDIOCF_REG_IER, val);
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chip->ak4117->change_callback_private = chip;
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chip->ak4117->change_callback = snd_pdacf_ak4117_change;
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/* update LED status */
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snd_pdacf_ak4117_change(chip->ak4117, AK4117_UNLCK, 0);
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return 0;
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}
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void snd_pdacf_powerdown(struct snd_pdacf *chip)
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{
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u16 val;
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val = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR);
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chip->suspend_reg_scr = val;
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val |= PDAUDIOCF_RED_LED_OFF | PDAUDIOCF_BLUE_LED_OFF;
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pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val);
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/* disable interrupts, but use direct write to preserve old register value in chip->regmap */
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val = inw(chip->port + PDAUDIOCF_REG_IER);
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val &= ~(PDAUDIOCF_IRQOVREN|PDAUDIOCF_IRQAKMEN|PDAUDIOCF_IRQLVLEN0|PDAUDIOCF_IRQLVLEN1);
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outw(val, chip->port + PDAUDIOCF_REG_IER);
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pdacf_reset(chip, 1);
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}
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#ifdef CONFIG_PM
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int snd_pdacf_suspend(struct snd_pdacf *chip)
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{
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u16 val;
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snd_power_change_state(chip->card, SNDRV_CTL_POWER_D3hot);
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snd_pcm_suspend_all(chip->pcm);
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/* disable interrupts, but use direct write to preserve old register value in chip->regmap */
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val = inw(chip->port + PDAUDIOCF_REG_IER);
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val &= ~(PDAUDIOCF_IRQOVREN|PDAUDIOCF_IRQAKMEN|PDAUDIOCF_IRQLVLEN0|PDAUDIOCF_IRQLVLEN1);
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outw(val, chip->port + PDAUDIOCF_REG_IER);
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chip->chip_status |= PDAUDIOCF_STAT_IS_SUSPENDED; /* ignore interrupts from now */
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snd_pdacf_powerdown(chip);
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return 0;
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}
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static inline int check_signal(struct snd_pdacf *chip)
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{
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return (chip->ak4117->rcs0 & AK4117_UNLCK) == 0;
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}
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int snd_pdacf_resume(struct snd_pdacf *chip)
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{
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int timeout = 40;
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pdacf_reinit(chip, 1);
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/* wait for AK4117's PLL */
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while (timeout-- > 0 &&
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(snd_ak4117_external_rate(chip->ak4117) <= 0 || !check_signal(chip)))
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mdelay(1);
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chip->chip_status &= ~PDAUDIOCF_STAT_IS_SUSPENDED;
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snd_power_change_state(chip->card, SNDRV_CTL_POWER_D0);
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return 0;
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}
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#endif
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