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This gets the GPIO ranges out of the driver and into the device tree where they belong. Standard DT bindings already exist for this. Since no systems with this are deployed we can just augment all device trees and the drivers at the same time and simplify the world. This also defines the array of GPIO chips related to the pin controller. Cc: arm@kernel.org Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
189 lines
4.9 KiB
C
189 lines
4.9 KiB
C
#ifndef PINCTRL_PINCTRL_NOMADIK_H
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#define PINCTRL_PINCTRL_NOMADIK_H
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/* Package definitions */
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#define PINCTRL_NMK_STN8815 0
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#define PINCTRL_NMK_DB8500 1
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#define PINCTRL_NMK_DB8540 2
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/* Alternate functions: function C is set in hw by setting both A and B */
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#define NMK_GPIO_ALT_GPIO 0
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#define NMK_GPIO_ALT_A 1
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#define NMK_GPIO_ALT_B 2
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#define NMK_GPIO_ALT_C (NMK_GPIO_ALT_A | NMK_GPIO_ALT_B)
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#define NMK_GPIO_ALT_CX_SHIFT 2
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#define NMK_GPIO_ALT_C1 ((1<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
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#define NMK_GPIO_ALT_C2 ((2<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
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#define NMK_GPIO_ALT_C3 ((3<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
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#define NMK_GPIO_ALT_C4 ((4<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
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#define PRCM_GPIOCR_ALTCX(pin_num,\
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altc1_used, altc1_ri, altc1_cb,\
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altc2_used, altc2_ri, altc2_cb,\
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altc3_used, altc3_ri, altc3_cb,\
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altc4_used, altc4_ri, altc4_cb)\
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{\
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.pin = pin_num,\
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.altcx[PRCM_IDX_GPIOCR_ALTC1] = {\
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.used = altc1_used,\
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.reg_index = altc1_ri,\
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.control_bit = altc1_cb\
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},\
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.altcx[PRCM_IDX_GPIOCR_ALTC2] = {\
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.used = altc2_used,\
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.reg_index = altc2_ri,\
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.control_bit = altc2_cb\
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},\
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.altcx[PRCM_IDX_GPIOCR_ALTC3] = {\
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.used = altc3_used,\
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.reg_index = altc3_ri,\
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.control_bit = altc3_cb\
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},\
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.altcx[PRCM_IDX_GPIOCR_ALTC4] = {\
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.used = altc4_used,\
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.reg_index = altc4_ri,\
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.control_bit = altc4_cb\
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},\
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}
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/**
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* enum prcm_gpiocr_reg_index
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* Used to reference an PRCM GPIOCR register address.
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*/
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enum prcm_gpiocr_reg_index {
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PRCM_IDX_GPIOCR1,
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PRCM_IDX_GPIOCR2,
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PRCM_IDX_GPIOCR3
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};
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/**
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* enum prcm_gpiocr_altcx_index
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* Used to reference an Other alternate-C function.
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*/
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enum prcm_gpiocr_altcx_index {
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PRCM_IDX_GPIOCR_ALTC1,
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PRCM_IDX_GPIOCR_ALTC2,
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PRCM_IDX_GPIOCR_ALTC3,
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PRCM_IDX_GPIOCR_ALTC4,
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PRCM_IDX_GPIOCR_ALTC_MAX,
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};
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/**
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* struct prcm_gpio_altcx - Other alternate-C function
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* @used: other alternate-C function availability
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* @reg_index: PRCM GPIOCR register index used to control the function
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* @control_bit: PRCM GPIOCR bit used to control the function
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*/
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struct prcm_gpiocr_altcx {
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bool used:1;
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u8 reg_index:2;
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u8 control_bit:5;
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} __packed;
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/**
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* struct prcm_gpio_altcx_pin_desc - Other alternate-C pin
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* @pin: The pin number
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* @altcx: array of other alternate-C[1-4] functions
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*/
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struct prcm_gpiocr_altcx_pin_desc {
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unsigned short pin;
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struct prcm_gpiocr_altcx altcx[PRCM_IDX_GPIOCR_ALTC_MAX];
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};
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/**
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* struct nmk_function - Nomadik pinctrl mux function
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* @name: The name of the function, exported to pinctrl core.
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* @groups: An array of pin groups that may select this function.
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* @ngroups: The number of entries in @groups.
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*/
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struct nmk_function {
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const char *name;
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const char * const *groups;
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unsigned ngroups;
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};
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/**
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* struct nmk_pingroup - describes a Nomadik pin group
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* @name: the name of this specific pin group
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* @pins: an array of discrete physical pins used in this group, taken
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* from the driver-local pin enumeration space
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* @num_pins: the number of pins in this group array, i.e. the number of
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* elements in .pins so we can iterate over that array
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* @altsetting: the altsetting to apply to all pins in this group to
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* configure them to be used by a function
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*/
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struct nmk_pingroup {
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const char *name;
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const unsigned int *pins;
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const unsigned npins;
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int altsetting;
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};
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/**
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* struct nmk_pinctrl_soc_data - Nomadik pin controller per-SoC configuration
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* @pins: An array describing all pins the pin controller affects.
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* All pins which are also GPIOs must be listed first within the
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* array, and be numbered identically to the GPIO controller's
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* numbering.
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* @npins: The number of entries in @pins.
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* @functions: The functions supported on this SoC.
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* @nfunction: The number of entries in @functions.
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* @groups: An array describing all pin groups the pin SoC supports.
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* @ngroups: The number of entries in @groups.
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* @altcx_pins: The pins that support Other alternate-C function on this SoC
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* @npins_altcx: The number of Other alternate-C pins
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* @prcm_gpiocr_registers: The array of PRCM GPIOCR registers on this SoC
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*/
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struct nmk_pinctrl_soc_data {
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const struct pinctrl_pin_desc *pins;
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unsigned npins;
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const struct nmk_function *functions;
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unsigned nfunctions;
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const struct nmk_pingroup *groups;
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unsigned ngroups;
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const struct prcm_gpiocr_altcx_pin_desc *altcx_pins;
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unsigned npins_altcx;
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const u16 *prcm_gpiocr_registers;
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};
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#ifdef CONFIG_PINCTRL_STN8815
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void nmk_pinctrl_stn8815_init(const struct nmk_pinctrl_soc_data **soc);
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#else
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static inline void
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nmk_pinctrl_stn8815_init(const struct nmk_pinctrl_soc_data **soc)
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{
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}
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#endif
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#ifdef CONFIG_PINCTRL_DB8500
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void nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc);
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#else
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static inline void
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nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc)
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{
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}
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#endif
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#ifdef CONFIG_PINCTRL_DB8540
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void nmk_pinctrl_db8540_init(const struct nmk_pinctrl_soc_data **soc);
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#else
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static inline void
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nmk_pinctrl_db8540_init(const struct nmk_pinctrl_soc_data **soc)
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{
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}
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#endif
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#endif /* PINCTRL_PINCTRL_NOMADIK_H */
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