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254cdf8ec3
Modern ARMv7-A cores can optionally implement these new hardware
features:
- VFPv4:
The latest version of the ARMv7 vector floating-point extensions,
including hardware support for fused multiple accumulate. D16 or D32
variants may be implemented.
- Integer divide:
The SDIV and UDIV instructions provide signed and unsigned integer
division in hardware. When implemented, these instructions may be
available in either both Thumb and ARM, or Thumb only.
This patch adds new HWCAP defines to describe these new features. The
integer divide capabilities are split into two bits for ARM and Thumb
respectively. Whilst HWCAP_IDIVA should never be set if HWCAP_IDIVT is
clear, separating the bits makes it easier to interpret from userspace.
Signed-off-by: Will Deacon <will.deacon@arm.com>
38 lines
979 B
C
38 lines
979 B
C
#ifndef __ASMARM_HWCAP_H
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#define __ASMARM_HWCAP_H
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/*
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* HWCAP flags - for elf_hwcap (in kernel) and AT_HWCAP
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*/
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#define HWCAP_SWP (1 << 0)
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#define HWCAP_HALF (1 << 1)
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#define HWCAP_THUMB (1 << 2)
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#define HWCAP_26BIT (1 << 3) /* Play it safe */
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#define HWCAP_FAST_MULT (1 << 4)
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#define HWCAP_FPA (1 << 5)
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#define HWCAP_VFP (1 << 6)
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#define HWCAP_EDSP (1 << 7)
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#define HWCAP_JAVA (1 << 8)
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#define HWCAP_IWMMXT (1 << 9)
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#define HWCAP_CRUNCH (1 << 10)
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#define HWCAP_THUMBEE (1 << 11)
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#define HWCAP_NEON (1 << 12)
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#define HWCAP_VFPv3 (1 << 13)
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#define HWCAP_VFPv3D16 (1 << 14)
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#define HWCAP_TLS (1 << 15)
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#define HWCAP_VFPv4 (1 << 16)
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#define HWCAP_IDIVA (1 << 17)
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#define HWCAP_IDIVT (1 << 18)
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#define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT)
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#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
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/*
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* This yields a mask that user programs can use to figure out what
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* instruction set this cpu supports.
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*/
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#define ELF_HWCAP (elf_hwcap)
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extern unsigned int elf_hwcap;
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#endif
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#endif
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