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90982dcdda
This dev_pm_ops structure is only stored in the pm field of a device_driver structure. This field is declared const, so dev_pm_ops structures that have this property can be declared as const also. Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Mark Brown <broonie@kernel.org>
422 lines
11 KiB
C
422 lines
11 KiB
C
/*
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* Au12x0/Au1550 PSC ALSA ASoC audio support.
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*
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* (c) 2007-2008 MSC Vertriebsges.m.b.H.,
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* Manuel Lauss <manuel.lauss@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Au1xxx-PSC I2S glue.
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*
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* NOTE: so far only PSC slave mode (bit- and frameclock) is supported.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/suspend.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/initval.h>
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#include <sound/soc.h>
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#include <asm/mach-au1x00/au1000.h>
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#include <asm/mach-au1x00/au1xxx_psc.h>
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#include "psc.h"
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/* supported I2S DAI hardware formats */
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#define AU1XPSC_I2S_DAIFMT \
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(SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_LEFT_J | \
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SND_SOC_DAIFMT_NB_NF)
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/* supported I2S direction */
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#define AU1XPSC_I2S_DIR \
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(SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
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#define AU1XPSC_I2S_RATES \
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SNDRV_PCM_RATE_8000_192000
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#define AU1XPSC_I2S_FMTS \
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(SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE)
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#define I2SSTAT_BUSY(stype) \
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((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_I2SSTAT_TB : PSC_I2SSTAT_RB)
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#define I2SPCR_START(stype) \
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((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_I2SPCR_TS : PSC_I2SPCR_RS)
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#define I2SPCR_STOP(stype) \
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((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_I2SPCR_TP : PSC_I2SPCR_RP)
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#define I2SPCR_CLRFIFO(stype) \
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((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_I2SPCR_TC : PSC_I2SPCR_RC)
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static int au1xpsc_i2s_set_fmt(struct snd_soc_dai *cpu_dai,
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unsigned int fmt)
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{
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struct au1xpsc_audio_data *pscdata = snd_soc_dai_get_drvdata(cpu_dai);
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unsigned long ct;
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int ret;
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ret = -EINVAL;
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ct = pscdata->cfg;
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ct &= ~(PSC_I2SCFG_XM | PSC_I2SCFG_MLJ); /* left-justified */
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_I2S:
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ct |= PSC_I2SCFG_XM; /* enable I2S mode */
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break;
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case SND_SOC_DAIFMT_MSB:
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break;
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case SND_SOC_DAIFMT_LSB:
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ct |= PSC_I2SCFG_MLJ; /* LSB (right-) justified */
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break;
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default:
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goto out;
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}
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ct &= ~(PSC_I2SCFG_BI | PSC_I2SCFG_WI); /* IB-IF */
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switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
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case SND_SOC_DAIFMT_NB_NF:
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ct |= PSC_I2SCFG_BI | PSC_I2SCFG_WI;
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break;
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case SND_SOC_DAIFMT_NB_IF:
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ct |= PSC_I2SCFG_BI;
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break;
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case SND_SOC_DAIFMT_IB_NF:
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ct |= PSC_I2SCFG_WI;
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break;
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case SND_SOC_DAIFMT_IB_IF:
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break;
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default:
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goto out;
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}
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBM_CFM: /* CODEC master */
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ct |= PSC_I2SCFG_MS; /* PSC I2S slave mode */
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break;
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case SND_SOC_DAIFMT_CBS_CFS: /* CODEC slave */
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ct &= ~PSC_I2SCFG_MS; /* PSC I2S Master mode */
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break;
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default:
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goto out;
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}
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pscdata->cfg = ct;
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ret = 0;
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out:
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return ret;
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}
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static int au1xpsc_i2s_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct au1xpsc_audio_data *pscdata = snd_soc_dai_get_drvdata(dai);
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int cfgbits;
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unsigned long stat;
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/* check if the PSC is already streaming data */
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stat = __raw_readl(I2S_STAT(pscdata));
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if (stat & (PSC_I2SSTAT_TB | PSC_I2SSTAT_RB)) {
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/* reject parameters not currently set up in hardware */
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cfgbits = __raw_readl(I2S_CFG(pscdata));
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if ((PSC_I2SCFG_GET_LEN(cfgbits) != params->msbits) ||
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(params_rate(params) != pscdata->rate))
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return -EINVAL;
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} else {
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/* set sample bitdepth */
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pscdata->cfg &= ~(0x1f << 4);
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pscdata->cfg |= PSC_I2SCFG_SET_LEN(params->msbits);
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/* remember current rate for other stream */
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pscdata->rate = params_rate(params);
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}
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return 0;
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}
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/* Configure PSC late: on my devel systems the codec is I2S master and
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* supplies the i2sbitclock __AND__ i2sMclk (!) to the PSC unit. ASoC
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* uses aggressive PM and switches the codec off when it is not in use
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* which also means the PSC unit doesn't get any clocks and is therefore
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* dead. That's why this chunk here gets called from the trigger callback
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* because I can be reasonably certain the codec is driving the clocks.
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*/
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static int au1xpsc_i2s_configure(struct au1xpsc_audio_data *pscdata)
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{
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unsigned long tmo;
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/* bring PSC out of sleep, and configure I2S unit */
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__raw_writel(PSC_CTRL_ENABLE, PSC_CTRL(pscdata));
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wmb(); /* drain writebuffer */
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tmo = 1000000;
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while (!(__raw_readl(I2S_STAT(pscdata)) & PSC_I2SSTAT_SR) && tmo)
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tmo--;
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if (!tmo)
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goto psc_err;
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__raw_writel(0, I2S_CFG(pscdata));
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wmb(); /* drain writebuffer */
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__raw_writel(pscdata->cfg | PSC_I2SCFG_DE_ENABLE, I2S_CFG(pscdata));
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wmb(); /* drain writebuffer */
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/* wait for I2S controller to become ready */
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tmo = 1000000;
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while (!(__raw_readl(I2S_STAT(pscdata)) & PSC_I2SSTAT_DR) && tmo)
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tmo--;
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if (tmo)
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return 0;
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psc_err:
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__raw_writel(0, I2S_CFG(pscdata));
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__raw_writel(PSC_CTRL_SUSPEND, PSC_CTRL(pscdata));
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wmb(); /* drain writebuffer */
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return -ETIMEDOUT;
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}
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static int au1xpsc_i2s_start(struct au1xpsc_audio_data *pscdata, int stype)
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{
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unsigned long tmo, stat;
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int ret;
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ret = 0;
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/* if both TX and RX are idle, configure the PSC */
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stat = __raw_readl(I2S_STAT(pscdata));
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if (!(stat & (PSC_I2SSTAT_TB | PSC_I2SSTAT_RB))) {
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ret = au1xpsc_i2s_configure(pscdata);
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if (ret)
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goto out;
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}
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__raw_writel(I2SPCR_CLRFIFO(stype), I2S_PCR(pscdata));
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wmb(); /* drain writebuffer */
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__raw_writel(I2SPCR_START(stype), I2S_PCR(pscdata));
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wmb(); /* drain writebuffer */
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/* wait for start confirmation */
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tmo = 1000000;
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while (!(__raw_readl(I2S_STAT(pscdata)) & I2SSTAT_BUSY(stype)) && tmo)
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tmo--;
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if (!tmo) {
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__raw_writel(I2SPCR_STOP(stype), I2S_PCR(pscdata));
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wmb(); /* drain writebuffer */
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ret = -ETIMEDOUT;
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}
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out:
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return ret;
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}
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static int au1xpsc_i2s_stop(struct au1xpsc_audio_data *pscdata, int stype)
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{
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unsigned long tmo, stat;
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__raw_writel(I2SPCR_STOP(stype), I2S_PCR(pscdata));
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wmb(); /* drain writebuffer */
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/* wait for stop confirmation */
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tmo = 1000000;
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while ((__raw_readl(I2S_STAT(pscdata)) & I2SSTAT_BUSY(stype)) && tmo)
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tmo--;
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/* if both TX and RX are idle, disable PSC */
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stat = __raw_readl(I2S_STAT(pscdata));
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if (!(stat & (PSC_I2SSTAT_TB | PSC_I2SSTAT_RB))) {
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__raw_writel(0, I2S_CFG(pscdata));
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wmb(); /* drain writebuffer */
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__raw_writel(PSC_CTRL_SUSPEND, PSC_CTRL(pscdata));
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wmb(); /* drain writebuffer */
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}
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return 0;
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}
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static int au1xpsc_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
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struct snd_soc_dai *dai)
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{
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struct au1xpsc_audio_data *pscdata = snd_soc_dai_get_drvdata(dai);
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int ret, stype = substream->stream;
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_RESUME:
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ret = au1xpsc_i2s_start(pscdata, stype);
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_SUSPEND:
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ret = au1xpsc_i2s_stop(pscdata, stype);
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break;
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default:
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ret = -EINVAL;
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}
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return ret;
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}
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static int au1xpsc_i2s_startup(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct au1xpsc_audio_data *pscdata = snd_soc_dai_get_drvdata(dai);
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snd_soc_dai_set_dma_data(dai, substream, &pscdata->dmaids[0]);
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return 0;
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}
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static const struct snd_soc_dai_ops au1xpsc_i2s_dai_ops = {
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.startup = au1xpsc_i2s_startup,
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.trigger = au1xpsc_i2s_trigger,
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.hw_params = au1xpsc_i2s_hw_params,
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.set_fmt = au1xpsc_i2s_set_fmt,
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};
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static const struct snd_soc_dai_driver au1xpsc_i2s_dai_template = {
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.playback = {
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.rates = AU1XPSC_I2S_RATES,
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.formats = AU1XPSC_I2S_FMTS,
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.channels_min = 2,
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.channels_max = 8, /* 2 without external help */
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},
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.capture = {
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.rates = AU1XPSC_I2S_RATES,
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.formats = AU1XPSC_I2S_FMTS,
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.channels_min = 2,
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.channels_max = 8, /* 2 without external help */
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},
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.ops = &au1xpsc_i2s_dai_ops,
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};
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static const struct snd_soc_component_driver au1xpsc_i2s_component = {
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.name = "au1xpsc-i2s",
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};
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static int au1xpsc_i2s_drvprobe(struct platform_device *pdev)
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{
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struct resource *iores, *dmares;
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unsigned long sel;
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struct au1xpsc_audio_data *wd;
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wd = devm_kzalloc(&pdev->dev, sizeof(struct au1xpsc_audio_data),
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GFP_KERNEL);
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if (!wd)
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return -ENOMEM;
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iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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wd->mmio = devm_ioremap_resource(&pdev->dev, iores);
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if (IS_ERR(wd->mmio))
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return PTR_ERR(wd->mmio);
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dmares = platform_get_resource(pdev, IORESOURCE_DMA, 0);
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if (!dmares)
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return -EBUSY;
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wd->dmaids[SNDRV_PCM_STREAM_PLAYBACK] = dmares->start;
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dmares = platform_get_resource(pdev, IORESOURCE_DMA, 1);
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if (!dmares)
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return -EBUSY;
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wd->dmaids[SNDRV_PCM_STREAM_CAPTURE] = dmares->start;
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/* preserve PSC clock source set up by platform (dev.platform_data
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* is already occupied by soc layer)
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*/
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sel = __raw_readl(PSC_SEL(wd)) & PSC_SEL_CLK_MASK;
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__raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
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wmb(); /* drain writebuffer */
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__raw_writel(PSC_SEL_PS_I2SMODE | sel, PSC_SEL(wd));
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__raw_writel(0, I2S_CFG(wd));
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wmb(); /* drain writebuffer */
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/* preconfigure: set max rx/tx fifo depths */
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wd->cfg |= PSC_I2SCFG_RT_FIFO8 | PSC_I2SCFG_TT_FIFO8;
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/* don't wait for I2S core to become ready now; clocks may not
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* be running yet; depending on clock input for PSC a wait might
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* time out.
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*/
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/* name the DAI like this device instance ("au1xpsc-i2s.PSCINDEX") */
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memcpy(&wd->dai_drv, &au1xpsc_i2s_dai_template,
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sizeof(struct snd_soc_dai_driver));
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wd->dai_drv.name = dev_name(&pdev->dev);
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platform_set_drvdata(pdev, wd);
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return snd_soc_register_component(&pdev->dev, &au1xpsc_i2s_component,
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&wd->dai_drv, 1);
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}
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static int au1xpsc_i2s_drvremove(struct platform_device *pdev)
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{
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struct au1xpsc_audio_data *wd = platform_get_drvdata(pdev);
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snd_soc_unregister_component(&pdev->dev);
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__raw_writel(0, I2S_CFG(wd));
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wmb(); /* drain writebuffer */
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__raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
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wmb(); /* drain writebuffer */
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return 0;
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}
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#ifdef CONFIG_PM
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static int au1xpsc_i2s_drvsuspend(struct device *dev)
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{
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struct au1xpsc_audio_data *wd = dev_get_drvdata(dev);
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/* save interesting register and disable PSC */
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wd->pm[0] = __raw_readl(PSC_SEL(wd));
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__raw_writel(0, I2S_CFG(wd));
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wmb(); /* drain writebuffer */
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__raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
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wmb(); /* drain writebuffer */
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return 0;
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}
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static int au1xpsc_i2s_drvresume(struct device *dev)
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{
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struct au1xpsc_audio_data *wd = dev_get_drvdata(dev);
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/* select I2S mode and PSC clock */
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__raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
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wmb(); /* drain writebuffer */
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__raw_writel(0, PSC_SEL(wd));
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wmb(); /* drain writebuffer */
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__raw_writel(wd->pm[0], PSC_SEL(wd));
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wmb(); /* drain writebuffer */
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return 0;
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}
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static const struct dev_pm_ops au1xpsci2s_pmops = {
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.suspend = au1xpsc_i2s_drvsuspend,
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.resume = au1xpsc_i2s_drvresume,
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};
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#define AU1XPSCI2S_PMOPS &au1xpsci2s_pmops
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#else
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#define AU1XPSCI2S_PMOPS NULL
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#endif
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static struct platform_driver au1xpsc_i2s_driver = {
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.driver = {
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.name = "au1xpsc_i2s",
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.pm = AU1XPSCI2S_PMOPS,
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},
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.probe = au1xpsc_i2s_drvprobe,
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.remove = au1xpsc_i2s_drvremove,
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};
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module_platform_driver(au1xpsc_i2s_driver);
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("Au12x0/Au1550 PSC I2S ALSA ASoC audio driver");
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MODULE_AUTHOR("Manuel Lauss");
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