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9d0cf6f564
Pull x86 asm updates from Ingo Molnar: "Misc changes: - context switch micro-optimization - debug printout micro-optimization - comment enhancements and typo fix" * 'x86-asm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86: Replace seq_printf() with seq_puts() x86/asm: Fix typo in arch/x86/kernel/asm_offset_64.c sched/x86: Add a comment clarifying LDT context switching sched/x86_64: Don't save flags on context switch
137 lines
3.4 KiB
C
137 lines
3.4 KiB
C
#ifndef _ASM_X86_MMU_CONTEXT_H
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#define _ASM_X86_MMU_CONTEXT_H
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#include <asm/desc.h>
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#include <linux/atomic.h>
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#include <linux/mm_types.h>
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#include <trace/events/tlb.h>
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#include <asm/pgalloc.h>
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#include <asm/tlbflush.h>
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#include <asm/paravirt.h>
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#include <asm/mpx.h>
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#ifndef CONFIG_PARAVIRT
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static inline void paravirt_activate_mm(struct mm_struct *prev,
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struct mm_struct *next)
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{
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}
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#endif /* !CONFIG_PARAVIRT */
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/*
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* Used for LDT copy/destruction.
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*/
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int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
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void destroy_context(struct mm_struct *mm);
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static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
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{
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#ifdef CONFIG_SMP
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if (this_cpu_read(cpu_tlbstate.state) == TLBSTATE_OK)
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this_cpu_write(cpu_tlbstate.state, TLBSTATE_LAZY);
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#endif
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}
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static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
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struct task_struct *tsk)
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{
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unsigned cpu = smp_processor_id();
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if (likely(prev != next)) {
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#ifdef CONFIG_SMP
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this_cpu_write(cpu_tlbstate.state, TLBSTATE_OK);
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this_cpu_write(cpu_tlbstate.active_mm, next);
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#endif
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cpumask_set_cpu(cpu, mm_cpumask(next));
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/* Re-load page tables */
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load_cr3(next->pgd);
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trace_tlb_flush(TLB_FLUSH_ON_TASK_SWITCH, TLB_FLUSH_ALL);
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/* Stop flush ipis for the previous mm */
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cpumask_clear_cpu(cpu, mm_cpumask(prev));
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/*
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* Load the LDT, if the LDT is different.
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*
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* It's possible leave_mm(prev) has been called. If so,
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* then prev->context.ldt could be out of sync with the
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* LDT descriptor or the LDT register. This can only happen
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* if prev->context.ldt is non-null, since we never free
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* an LDT. But LDTs can't be shared across mms, so
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* prev->context.ldt won't be equal to next->context.ldt.
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*/
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if (unlikely(prev->context.ldt != next->context.ldt))
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load_LDT_nolock(&next->context);
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}
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#ifdef CONFIG_SMP
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else {
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this_cpu_write(cpu_tlbstate.state, TLBSTATE_OK);
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BUG_ON(this_cpu_read(cpu_tlbstate.active_mm) != next);
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if (!cpumask_test_cpu(cpu, mm_cpumask(next))) {
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/*
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* On established mms, the mm_cpumask is only changed
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* from irq context, from ptep_clear_flush() while in
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* lazy tlb mode, and here. Irqs are blocked during
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* schedule, protecting us from simultaneous changes.
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*/
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cpumask_set_cpu(cpu, mm_cpumask(next));
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/*
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* We were in lazy tlb mode and leave_mm disabled
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* tlb flush IPI delivery. We must reload CR3
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* to make sure to use no freed page tables.
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*/
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load_cr3(next->pgd);
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trace_tlb_flush(TLB_FLUSH_ON_TASK_SWITCH, TLB_FLUSH_ALL);
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load_LDT_nolock(&next->context);
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}
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}
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#endif
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}
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#define activate_mm(prev, next) \
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do { \
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paravirt_activate_mm((prev), (next)); \
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switch_mm((prev), (next), NULL); \
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} while (0);
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#ifdef CONFIG_X86_32
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#define deactivate_mm(tsk, mm) \
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do { \
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lazy_load_gs(0); \
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} while (0)
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#else
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#define deactivate_mm(tsk, mm) \
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do { \
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load_gs_index(0); \
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loadsegment(fs, 0); \
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} while (0)
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#endif
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static inline void arch_dup_mmap(struct mm_struct *oldmm,
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struct mm_struct *mm)
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{
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paravirt_arch_dup_mmap(oldmm, mm);
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}
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static inline void arch_exit_mmap(struct mm_struct *mm)
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{
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paravirt_arch_exit_mmap(mm);
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}
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static inline void arch_bprm_mm_init(struct mm_struct *mm,
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struct vm_area_struct *vma)
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{
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mpx_mm_init(mm);
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}
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static inline void arch_unmap(struct mm_struct *mm, struct vm_area_struct *vma,
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unsigned long start, unsigned long end)
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{
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mpx_notify_unmap(mm, vma, start, end);
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}
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#endif /* _ASM_X86_MMU_CONTEXT_H */
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