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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
206 lines
4.7 KiB
C
206 lines
4.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 2013 STMicroelectronics Limited
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* Author: Stephen Gallimore <stephen.gallimore@st.com>
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*
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* Inspired by mach-imx/src.c
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*/
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/module.h>
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#include <linux/err.h>
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#include <linux/types.h>
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#include <linux/of_device.h>
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#include <linux/regmap.h>
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#include <linux/mfd/syscon.h>
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#include "reset-syscfg.h"
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/**
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* Reset channel regmap configuration
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*
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* @reset: regmap field for the channel's reset bit.
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* @ack: regmap field for the channel's ack bit (optional).
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*/
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struct syscfg_reset_channel {
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struct regmap_field *reset;
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struct regmap_field *ack;
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};
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/**
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* A reset controller which groups together a set of related reset bits, which
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* may be located in different system configuration registers.
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*
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* @rst: base reset controller structure.
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* @active_low: are the resets in this controller active low, i.e. clearing
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* the reset bit puts the hardware into reset.
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* @channels: An array of reset channels for this controller.
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*/
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struct syscfg_reset_controller {
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struct reset_controller_dev rst;
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bool active_low;
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struct syscfg_reset_channel *channels;
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};
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#define to_syscfg_reset_controller(_rst) \
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container_of(_rst, struct syscfg_reset_controller, rst)
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static int syscfg_reset_program_hw(struct reset_controller_dev *rcdev,
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unsigned long idx, int assert)
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{
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struct syscfg_reset_controller *rst = to_syscfg_reset_controller(rcdev);
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const struct syscfg_reset_channel *ch;
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u32 ctrl_val = rst->active_low ? !assert : !!assert;
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int err;
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if (idx >= rcdev->nr_resets)
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return -EINVAL;
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ch = &rst->channels[idx];
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err = regmap_field_write(ch->reset, ctrl_val);
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if (err)
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return err;
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if (ch->ack) {
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unsigned long timeout = jiffies + msecs_to_jiffies(1000);
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u32 ack_val;
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while (true) {
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err = regmap_field_read(ch->ack, &ack_val);
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if (err)
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return err;
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if (ack_val == ctrl_val)
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break;
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if (time_after(jiffies, timeout))
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return -ETIME;
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cpu_relax();
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}
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}
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return 0;
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}
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static int syscfg_reset_assert(struct reset_controller_dev *rcdev,
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unsigned long idx)
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{
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return syscfg_reset_program_hw(rcdev, idx, true);
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}
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static int syscfg_reset_deassert(struct reset_controller_dev *rcdev,
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unsigned long idx)
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{
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return syscfg_reset_program_hw(rcdev, idx, false);
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}
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static int syscfg_reset_dev(struct reset_controller_dev *rcdev,
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unsigned long idx)
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{
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int err;
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err = syscfg_reset_assert(rcdev, idx);
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if (err)
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return err;
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return syscfg_reset_deassert(rcdev, idx);
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}
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static int syscfg_reset_status(struct reset_controller_dev *rcdev,
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unsigned long idx)
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{
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struct syscfg_reset_controller *rst = to_syscfg_reset_controller(rcdev);
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const struct syscfg_reset_channel *ch;
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u32 ret_val = 0;
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int err;
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if (idx >= rcdev->nr_resets)
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return -EINVAL;
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ch = &rst->channels[idx];
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if (ch->ack)
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err = regmap_field_read(ch->ack, &ret_val);
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else
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err = regmap_field_read(ch->reset, &ret_val);
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if (err)
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return err;
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return rst->active_low ? !ret_val : !!ret_val;
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}
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static const struct reset_control_ops syscfg_reset_ops = {
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.reset = syscfg_reset_dev,
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.assert = syscfg_reset_assert,
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.deassert = syscfg_reset_deassert,
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.status = syscfg_reset_status,
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};
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static int syscfg_reset_controller_register(struct device *dev,
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const struct syscfg_reset_controller_data *data)
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{
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struct syscfg_reset_controller *rc;
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int i, err;
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rc = devm_kzalloc(dev, sizeof(*rc), GFP_KERNEL);
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if (!rc)
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return -ENOMEM;
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rc->channels = devm_kcalloc(dev, data->nr_channels,
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sizeof(*rc->channels), GFP_KERNEL);
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if (!rc->channels)
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return -ENOMEM;
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rc->rst.ops = &syscfg_reset_ops,
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rc->rst.of_node = dev->of_node;
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rc->rst.nr_resets = data->nr_channels;
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rc->active_low = data->active_low;
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for (i = 0; i < data->nr_channels; i++) {
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struct regmap *map;
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struct regmap_field *f;
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const char *compatible = data->channels[i].compatible;
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map = syscon_regmap_lookup_by_compatible(compatible);
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if (IS_ERR(map))
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return PTR_ERR(map);
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f = devm_regmap_field_alloc(dev, map, data->channels[i].reset);
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if (IS_ERR(f))
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return PTR_ERR(f);
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rc->channels[i].reset = f;
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if (!data->wait_for_ack)
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continue;
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f = devm_regmap_field_alloc(dev, map, data->channels[i].ack);
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if (IS_ERR(f))
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return PTR_ERR(f);
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rc->channels[i].ack = f;
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}
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err = reset_controller_register(&rc->rst);
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if (!err)
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dev_info(dev, "registered\n");
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return err;
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}
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int syscfg_reset_probe(struct platform_device *pdev)
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{
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struct device *dev = pdev ? &pdev->dev : NULL;
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const struct of_device_id *match;
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if (!dev || !dev->driver)
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return -ENODEV;
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match = of_match_device(dev->driver->of_match_table, dev);
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if (!match || !match->data)
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return -EINVAL;
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return syscfg_reset_controller_register(dev, match->data);
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}
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