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4aa908fe47
The TI part is equivalent to the NXP part, and its compatible value is not documented in the DT bindings. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Wolfram Sang <wsa@kernel.org>
94 lines
2.7 KiB
Plaintext
94 lines
2.7 KiB
Plaintext
CE4100 I2C
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----------
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CE4100 has one PCI device which is described as the I2C-Controller. This
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PCI device has three PCI-bars, each bar contains a complete I2C
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controller. So we have a total of three independent I2C-Controllers
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which share only an interrupt line.
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The driver is probed via the PCI-ID and is gathering the information of
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attached devices from the devices tree.
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Grant Likely recommended to use the ranges property to map the PCI-Bar
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number to its physical address and to use this to find the child nodes
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of the specific I2C controller. This were his exact words:
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Here's where the magic happens. Each entry in
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ranges describes how the parent pci address space
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(middle group of 3) is translated to the local
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address space (first group of 2) and the size of
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each range (last cell). In this particular case,
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the first cell of the local address is chosen to be
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1:1 mapped to the BARs, and the second is the
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offset from be base of the BAR (which would be
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non-zero if you had 2 or more devices mapped off
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the same BAR)
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ranges allows the address mapping to be described
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in a way that the OS can interpret without
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requiring custom device driver code.
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This is an example which is used on FalconFalls:
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------------------------------------------------
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i2c-controller@b,2 {
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#address-cells = <2>;
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#size-cells = <1>;
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compatible = "pci8086,2e68.2",
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"pci8086,2e68",
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"pciclass,ff0000",
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"pciclass,ff00";
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reg = <0x15a00 0x0 0x0 0x0 0x0>;
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interrupts = <16 1>;
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/* as described by Grant, the first number in the group of
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* three is the bar number followed by the 64bit bar address
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* followed by size of the mapping. The bar address
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* requires also a valid translation in parents ranges
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* property.
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*/
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ranges = <0 0 0x02000000 0 0xdffe0500 0x100
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1 0 0x02000000 0 0xdffe0600 0x100
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2 0 0x02000000 0 0xdffe0700 0x100>;
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i2c@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "intel,ce4100-i2c-controller";
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/* The first number in the reg property is the
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* number of the bar
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*/
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reg = <0 0 0x100>;
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/* This I2C controller has no devices */
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};
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i2c@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "intel,ce4100-i2c-controller";
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reg = <1 0 0x100>;
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/* This I2C controller has one gpio controller */
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gpio@26 {
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#gpio-cells = <2>;
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compatible = "nxp,pcf8575";
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reg = <0x26>;
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gpio-controller;
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};
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};
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i2c@2 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "intel,ce4100-i2c-controller";
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reg = <2 0 0x100>;
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gpio@26 {
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#gpio-cells = <2>;
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compatible = "nxp,pcf8575";
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reg = <0x26>;
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gpio-controller;
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};
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};
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};
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