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f10bb00790
Adds support for 16GB hugepage size. To use this page size use kernel parameters as: default_hugepagesz=16G hugepagesz=16G hugepages=10 Testing: Tested with the stream benchmark which allocates 48G of arrays backed by 16G hugepages and does RW operation on them in parallel. Orabug: 25362942 Signed-off-by: Nitin Gupta <nitin.m.gupta@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
160 lines
4.5 KiB
C
160 lines
4.5 KiB
C
#ifndef _SPARC64_PAGE_H
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#define _SPARC64_PAGE_H
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#include <linux/const.h>
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#define PAGE_SHIFT 13
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#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
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#define PAGE_MASK (~(PAGE_SIZE-1))
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/* Flushing for D-cache alias handling is only needed if
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* the page size is smaller than 16K.
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*/
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#if PAGE_SHIFT < 14
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#define DCACHE_ALIASING_POSSIBLE
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#endif
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#define HPAGE_SHIFT 23
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#define REAL_HPAGE_SHIFT 22
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#define HPAGE_16GB_SHIFT 34
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#define HPAGE_2GB_SHIFT 31
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#define HPAGE_256MB_SHIFT 28
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#define HPAGE_64K_SHIFT 16
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#define REAL_HPAGE_SIZE (_AC(1,UL) << REAL_HPAGE_SHIFT)
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#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
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#define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT)
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#define HPAGE_MASK (~(HPAGE_SIZE - 1UL))
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#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
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#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
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#define REAL_HPAGE_PER_HPAGE (_AC(1,UL) << (HPAGE_SHIFT - REAL_HPAGE_SHIFT))
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#define HUGE_MAX_HSTATE 5
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#endif
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#ifndef __ASSEMBLY__
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#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
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struct pt_regs;
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void hugetlb_setup(struct pt_regs *regs);
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#endif
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#define WANT_PAGE_VIRTUAL
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void _clear_page(void *page);
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#define clear_page(X) _clear_page((void *)(X))
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struct page;
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void clear_user_page(void *addr, unsigned long vaddr, struct page *page);
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#define copy_page(X,Y) memcpy((void *)(X), (void *)(Y), PAGE_SIZE)
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void copy_user_page(void *to, void *from, unsigned long vaddr, struct page *topage);
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/* Unlike sparc32, sparc64's parameter passing API is more
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* sane in that structures which as small enough are passed
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* in registers instead of on the stack. Thus, setting
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* STRICT_MM_TYPECHECKS does not generate worse code so
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* let's enable it to get the type checking.
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*/
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#define STRICT_MM_TYPECHECKS
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#ifdef STRICT_MM_TYPECHECKS
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/* These are used to make use of C type-checking.. */
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typedef struct { unsigned long pte; } pte_t;
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typedef struct { unsigned long iopte; } iopte_t;
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typedef struct { unsigned long pmd; } pmd_t;
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typedef struct { unsigned long pud; } pud_t;
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typedef struct { unsigned long pgd; } pgd_t;
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typedef struct { unsigned long pgprot; } pgprot_t;
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#define pte_val(x) ((x).pte)
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#define iopte_val(x) ((x).iopte)
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#define pmd_val(x) ((x).pmd)
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#define pud_val(x) ((x).pud)
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#define pgd_val(x) ((x).pgd)
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#define pgprot_val(x) ((x).pgprot)
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#define __pte(x) ((pte_t) { (x) } )
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#define __iopte(x) ((iopte_t) { (x) } )
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#define __pmd(x) ((pmd_t) { (x) } )
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#define __pud(x) ((pud_t) { (x) } )
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#define __pgd(x) ((pgd_t) { (x) } )
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#define __pgprot(x) ((pgprot_t) { (x) } )
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#else
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/* .. while these make it easier on the compiler */
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typedef unsigned long pte_t;
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typedef unsigned long iopte_t;
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typedef unsigned long pmd_t;
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typedef unsigned long pud_t;
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typedef unsigned long pgd_t;
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typedef unsigned long pgprot_t;
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#define pte_val(x) (x)
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#define iopte_val(x) (x)
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#define pmd_val(x) (x)
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#define pud_val(x) (x)
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#define pgd_val(x) (x)
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#define pgprot_val(x) (x)
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#define __pte(x) (x)
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#define __iopte(x) (x)
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#define __pmd(x) (x)
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#define __pud(x) (x)
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#define __pgd(x) (x)
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#define __pgprot(x) (x)
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#endif /* (STRICT_MM_TYPECHECKS) */
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typedef pte_t *pgtable_t;
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extern unsigned long sparc64_va_hole_top;
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extern unsigned long sparc64_va_hole_bottom;
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/* The next two defines specify the actual exclusion region we
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* enforce, wherein we use a 4GB red zone on each side of the VA hole.
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*/
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#define VA_EXCLUDE_START (sparc64_va_hole_bottom - (1UL << 32UL))
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#define VA_EXCLUDE_END (sparc64_va_hole_top + (1UL << 32UL))
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#define TASK_UNMAPPED_BASE (test_thread_flag(TIF_32BIT) ? \
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_AC(0x0000000070000000,UL) : \
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VA_EXCLUDE_END)
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#include <asm-generic/memory_model.h>
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extern unsigned long PAGE_OFFSET;
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#endif /* !(__ASSEMBLY__) */
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/* The maximum number of physical memory address bits we support. The
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* largest value we can support is whatever "KPGD_SHIFT + KPTE_BITS"
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* evaluates to.
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*/
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#define MAX_PHYS_ADDRESS_BITS 53
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#define ILOG2_4MB 22
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#define ILOG2_256MB 28
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#ifndef __ASSEMBLY__
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#define __pa(x) ((unsigned long)(x) - PAGE_OFFSET)
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#define __va(x) ((void *)((unsigned long) (x) + PAGE_OFFSET))
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#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
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#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr)>>PAGE_SHIFT)
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#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
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#define virt_to_phys __pa
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#define phys_to_virt __va
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#endif /* !(__ASSEMBLY__) */
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#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
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VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
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#include <asm-generic/getorder.h>
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#endif /* _SPARC64_PAGE_H */
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