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830145796a
The arch/arm/mach-exynos4 directory (CONFIG_ARCH_EXYNOS4) has made for plaforms based on EXYNOS4 SoCs. But since upcoming Samsung's SoCs such as EXYNOS5 (ARM Cortex A15) can reuse most codes in current mach-exynos4, one mach-exynos directory will be used for them. This patch changes to CONFIG_ARCH_EXYNOS (arch/arm/mach-exynos) but keeps original CONFIG_ARCH_EXYNOS4 in mach-exynos/Kconfig to avoid changing in driver side. Cc: Arnd Bergmann <arnd@arndb.de> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
44 lines
1.1 KiB
C
44 lines
1.1 KiB
C
/* linux/arch/arm/mach-exynos4/setup-fimd0.c
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*
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* Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* Base Exynos4 FIMD 0 configuration
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/fb.h>
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#include <linux/gpio.h>
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#include <plat/gpio-cfg.h>
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#include <plat/regs-fb-v4.h>
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#include <mach/map.h>
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void exynos4_fimd0_gpio_setup_24bpp(void)
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{
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unsigned int reg;
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s3c_gpio_cfgrange_nopull(EXYNOS4_GPF0(0), 8, S3C_GPIO_SFN(2));
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s3c_gpio_cfgrange_nopull(EXYNOS4_GPF1(0), 8, S3C_GPIO_SFN(2));
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s3c_gpio_cfgrange_nopull(EXYNOS4_GPF2(0), 8, S3C_GPIO_SFN(2));
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s3c_gpio_cfgrange_nopull(EXYNOS4_GPF3(0), 4, S3C_GPIO_SFN(2));
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/*
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* Set DISPLAY_CONTROL register for Display path selection.
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*
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* DISPLAY_CONTROL[1:0]
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* ---------------------
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* 00 | MIE
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* 01 | MDINE
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* 10 | FIMD : selected
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* 11 | FIMD
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*/
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reg = __raw_readl(S3C_VA_SYS + 0x0210);
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reg |= (1 << 1);
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__raw_writel(reg, S3C_VA_SYS + 0x0210);
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}
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