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Add the DT binding documentation for Interrupt router driver. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
83 lines
3.4 KiB
Plaintext
83 lines
3.4 KiB
Plaintext
Texas Instruments K3 Interrupt Router
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=====================================
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The Interrupt Router (INTR) module provides a mechanism to mux M
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interrupt inputs to N interrupt outputs, where all M inputs are selectable
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to be driven per N output. An Interrupt Router can either handle edge triggered
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or level triggered interrupts and that is fixed in hardware.
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Interrupt Router
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+----------------------+
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| Inputs Outputs |
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+-------+ | +------+ +-----+ |
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| GPIO |----------->| | irq0 | | 0 | | Host IRQ
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+-------+ | +------+ +-----+ | controller
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| . . | +-------+
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+-------+ | . . |----->| IRQ |
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| INTA |----------->| . . | +-------+
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+-------+ | . +-----+ |
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| +------+ | N | |
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| | irqM | +-----+ |
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| +------+ |
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+----------------------+
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There is one register per output (MUXCNTL_N) that controls the selection.
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Configuration of these MUXCNTL_N registers is done by a system controller
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(like the Device Memory and Security Controller on K3 AM654 SoC). System
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controller will keep track of the used and unused registers within the Router.
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Driver should request the system controller to get the range of GIC IRQs
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assigned to the requesting hosts. It is the drivers responsibility to keep
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track of Host IRQs.
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Communication between the host processor running an OS and the system
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controller happens through a protocol called TI System Control Interface
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(TISCI protocol). For more details refer:
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Documentation/devicetree/bindings/arm/keystone/ti,sci.txt
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TISCI Interrupt Router Node:
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----------------------------
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Required Properties:
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- compatible: Must be "ti,sci-intr".
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- ti,intr-trigger-type: Should be one of the following:
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1: If intr supports edge triggered interrupts.
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4: If intr supports level triggered interrupts.
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- interrupt-controller: Identifies the node as an interrupt controller
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- #interrupt-cells: Specifies the number of cells needed to encode an
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interrupt source. The value should be 2.
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First cell should contain the TISCI device ID of source
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Second cell should contain the interrupt source offset
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within the device.
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- ti,sci: Phandle to TI-SCI compatible System controller node.
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- ti,sci-dst-id: TISCI device ID of the destination IRQ controller.
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- ti,sci-rm-range-girq: Array of TISCI subtype ids representing the host irqs
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assigned to this interrupt router. Each subtype id
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corresponds to a range of host irqs.
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For more details on TISCI IRQ resource management refer:
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http://downloads.ti.com/tisci/esd/latest/2_tisci_msgs/rm/rm_irq.html
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Example:
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--------
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The following example demonstrates both interrupt router node and the consumer
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node(main gpio) on the AM654 SoC:
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main_intr: interrupt-controller0 {
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compatible = "ti,sci-intr";
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ti,intr-trigger-type = <1>;
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interrupt-controller;
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interrupt-parent = <&gic500>;
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#interrupt-cells = <2>;
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ti,sci = <&dmsc>;
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ti,sci-dst-id = <56>;
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ti,sci-rm-range-girq = <0x1>;
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};
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main_gpio0: gpio@600000 {
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...
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interrupt-parent = <&main_intr>;
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interrupts = <57 256>, <57 257>, <57 258>,
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<57 259>, <57 260>, <57 261>;
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...
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};
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