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Certain EEPROMS have a size that is larger than the number of address bytes would allow, and store the MSB of the address in bit 3 of the instruction byte. This can be described in platform data using EE_INSTR_BIT3_IS_ADDR, or in DT using the obsolete legacy "at25,addr-mode" property. But currently there exists no non-deprecated way to describe this in DT. Hence extend the existing "address-width" DT property to allow specifying 9 address bits, and enable support for that in the driver. This has been tested with a Microchip 25LC040A. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
43 lines
1.3 KiB
Plaintext
43 lines
1.3 KiB
Plaintext
EEPROMs (SPI) compatible with Atmel at25.
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Required properties:
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- compatible : Should be "<vendor>,<type>", and generic value "atmel,at25".
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Example "<vendor>,<type>" values:
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"microchip,25lc040"
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"st,m95m02"
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"st,m95256"
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- reg : chip select number
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- spi-max-frequency : max spi frequency to use
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- pagesize : size of the eeprom page
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- size : total eeprom size in bytes
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- address-width : number of address bits (one of 8, 9, 16, or 24).
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For 9 bits, the MSB of the address is sent as bit 3 of the instruction
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byte, before the address byte.
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Optional properties:
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- spi-cpha : SPI shifted clock phase, as per spi-bus bindings.
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- spi-cpol : SPI inverse clock polarity, as per spi-bus bindings.
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- read-only : this parameter-less property disables writes to the eeprom
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Obsolete legacy properties can be used in place of "size", "pagesize",
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"address-width", and "read-only":
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- at25,byte-len : total eeprom size in bytes
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- at25,addr-mode : addr-mode flags, as defined in include/linux/spi/eeprom.h
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- at25,page-size : size of the eeprom page
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Additional compatible properties are also allowed.
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Example:
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eeprom@0 {
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compatible = "st,m95256", "atmel,at25";
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reg = <0>
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spi-max-frequency = <5000000>;
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spi-cpha;
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spi-cpol;
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pagesize = <64>;
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size = <32768>;
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address-width = <16>;
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};
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