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The IPROC PCIe host controller implementation returns CFG_RETRY_STATUS (0xffff0001) data when it receives a CRS completion, regardless of the address of the read or the CRS Software Visibility Enable bit. As a workaround the driver retries in software any read that returns CFG_RETRY_STATUS even though, for reads of registers that are not Vendor ID, the register value can correspond to CFG_RETRY_STATUS; this situation would cause a timeout and failure of reading a valid register value. IPROC PCIe host controller PAXB v2 has a register to show config read status flags like SC, UR, CRS and CA. Using this status flag, an extra check is added to confirm the CRS using status flags before reissuing a config read, fixing the issue. Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com> [lorenzo.pieralisi@arm.com: rewrote commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Scott Branden <scott.branden@broadcom.com> |
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| .. | ||
| dwc | ||
| Kconfig | ||
| Makefile | ||
| pci-aardvark.c | ||
| pci-ftpci100.c | ||
| pci-host-common.c | ||
| pci-host-generic.c | ||
| pci-hyperv.c | ||
| pci-mvebu.c | ||
| pci-rcar-gen2.c | ||
| pci-tegra.c | ||
| pci-thunder-ecam.c | ||
| pci-thunder-pem.c | ||
| pci-v3-semi.c | ||
| pci-versatile.c | ||
| pci-xgene-msi.c | ||
| pci-xgene.c | ||
| pcie-altera-msi.c | ||
| pcie-altera.c | ||
| pcie-cadence-ep.c | ||
| pcie-cadence-host.c | ||
| pcie-cadence.c | ||
| pcie-cadence.h | ||
| pcie-iproc-bcma.c | ||
| pcie-iproc-msi.c | ||
| pcie-iproc-platform.c | ||
| pcie-iproc.c | ||
| pcie-iproc.h | ||
| pcie-mediatek.c | ||
| pcie-mobiveil.c | ||
| pcie-rcar.c | ||
| pcie-rockchip-ep.c | ||
| pcie-rockchip-host.c | ||
| pcie-rockchip.c | ||
| pcie-rockchip.h | ||
| pcie-tango.c | ||
| pcie-xilinx-nwl.c | ||
| pcie-xilinx.c | ||
| vmd.c | ||