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0a20de446c
Add support for faster IOC recovery after failure.
Split bfa_ioc.c into three files:
bfa_ioc.c: Common code shared between crossbow and catapult ASIC's.
bfa_ioc_cb.c: Code specific to the crossbow, reg mapping and
interrupt related routines.
bfa_ioc_ct.c: Code specific to the catapult, reg mapping and
interrupt related routines.
Fix to make sure IOC reinitialize's properly on enable request -
update the ioc_fwstate reg with BFI_IOC_FAIL on ioc disable mbox cmd
timeout.
Makefile changes to support the 2 newly added files bfa_ioc_cb.c and
bfa_ioc_ct.c.
Signed-off-by: Krishna Gudipati <kgudipat@brocade.com>
Signed-off-by: James Bottomley <James.Bottomley@suse.de>
203 lines
5.7 KiB
C
203 lines
5.7 KiB
C
/*
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* Copyright (c) 2005-2009 Brocade Communications Systems, Inc.
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* All rights reserved
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* www.brocade.com
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*
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* Linux driver for Brocade Fibre Channel Host Bus Adapter.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License (GPL) Version 2 as
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* published by the Free Software Foundation
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*/
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#ifndef __BFI_IOC_H__
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#define __BFI_IOC_H__
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#include "bfi.h"
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#include <defs/bfa_defs_ioc.h>
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#pragma pack(1)
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enum bfi_ioc_h2i_msgs {
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BFI_IOC_H2I_ENABLE_REQ = 1,
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BFI_IOC_H2I_DISABLE_REQ = 2,
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BFI_IOC_H2I_GETATTR_REQ = 3,
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BFI_IOC_H2I_DBG_SYNC = 4,
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BFI_IOC_H2I_DBG_DUMP = 5,
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};
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enum bfi_ioc_i2h_msgs {
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BFI_IOC_I2H_ENABLE_REPLY = BFA_I2HM(1),
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BFI_IOC_I2H_DISABLE_REPLY = BFA_I2HM(2),
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BFI_IOC_I2H_GETATTR_REPLY = BFA_I2HM(3),
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BFI_IOC_I2H_READY_EVENT = BFA_I2HM(4),
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BFI_IOC_I2H_HBEAT = BFA_I2HM(5),
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};
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/**
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* BFI_IOC_H2I_GETATTR_REQ message
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*/
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struct bfi_ioc_getattr_req_s {
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struct bfi_mhdr_s mh;
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union bfi_addr_u attr_addr;
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};
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struct bfi_ioc_attr_s {
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wwn_t mfg_wwn;
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mac_t mfg_mac;
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u16 rsvd_a;
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char brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)];
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u8 pcie_gen;
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u8 pcie_lanes_orig;
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u8 pcie_lanes;
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u8 rx_bbcredit; /* receive buffer credits */
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u32 adapter_prop; /* adapter properties */
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u16 maxfrsize; /* max receive frame size */
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char asic_rev;
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u8 rsvd_b;
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char fw_version[BFA_VERSION_LEN];
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char optrom_version[BFA_VERSION_LEN];
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struct bfa_mfg_vpd_s vpd;
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};
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/**
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* BFI_IOC_I2H_GETATTR_REPLY message
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*/
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struct bfi_ioc_getattr_reply_s {
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struct bfi_mhdr_s mh; /* Common msg header */
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u8 status; /* cfg reply status */
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u8 rsvd[3];
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};
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/**
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* Firmware memory page offsets
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*/
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#define BFI_IOC_SMEM_PG0_CB (0x40)
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#define BFI_IOC_SMEM_PG0_CT (0x180)
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/**
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* Firmware trace offset
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*/
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#define BFI_IOC_TRC_OFF (0x4b00)
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#define BFI_IOC_TRC_ENTS 256
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#define BFI_IOC_FW_SIGNATURE (0xbfadbfad)
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#define BFI_IOC_MD5SUM_SZ 4
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struct bfi_ioc_image_hdr_s {
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u32 signature; /* constant signature */
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u32 rsvd_a;
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u32 exec; /* exec vector */
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u32 param; /* parameters */
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u32 rsvd_b[4];
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u32 md5sum[BFI_IOC_MD5SUM_SZ];
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};
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/**
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* BFI_IOC_I2H_READY_EVENT message
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*/
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struct bfi_ioc_rdy_event_s {
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struct bfi_mhdr_s mh; /* common msg header */
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u8 init_status; /* init event status */
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u8 rsvd[3];
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};
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struct bfi_ioc_hbeat_s {
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struct bfi_mhdr_s mh; /* common msg header */
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u32 hb_count; /* current heart beat count */
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};
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/**
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* IOC hardware/firmware state
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*/
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enum bfi_ioc_state {
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BFI_IOC_UNINIT = 0, /* not initialized */
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BFI_IOC_INITING = 1, /* h/w is being initialized */
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BFI_IOC_HWINIT = 2, /* h/w is initialized */
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BFI_IOC_CFG = 3, /* IOC configuration in progress */
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BFI_IOC_OP = 4, /* IOC is operational */
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BFI_IOC_DISABLING = 5, /* IOC is being disabled */
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BFI_IOC_DISABLED = 6, /* IOC is disabled */
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BFI_IOC_CFG_DISABLED = 7, /* IOC is being disabled;transient */
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BFI_IOC_FAIL = 8, /* IOC heart-beat failure */
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BFI_IOC_MEMTEST = 9, /* IOC is doing memtest */
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};
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#define BFI_IOC_ENDIAN_SIG 0x12345678
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enum {
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BFI_ADAPTER_TYPE_FC = 0x01, /* FC adapters */
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BFI_ADAPTER_TYPE_MK = 0x0f0000, /* adapter type mask */
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BFI_ADAPTER_TYPE_SH = 16, /* adapter type shift */
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BFI_ADAPTER_NPORTS_MK = 0xff00, /* number of ports mask */
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BFI_ADAPTER_NPORTS_SH = 8, /* number of ports shift */
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BFI_ADAPTER_SPEED_MK = 0xff, /* adapter speed mask */
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BFI_ADAPTER_SPEED_SH = 0, /* adapter speed shift */
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BFI_ADAPTER_PROTO = 0x100000, /* prototype adapaters */
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BFI_ADAPTER_TTV = 0x200000, /* TTV debug capable */
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BFI_ADAPTER_UNSUPP = 0x400000, /* unknown adapter type */
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};
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#define BFI_ADAPTER_GETP(__prop, __adap_prop) \
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(((__adap_prop) & BFI_ADAPTER_ ## __prop ## _MK) >> \
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BFI_ADAPTER_ ## __prop ## _SH)
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#define BFI_ADAPTER_SETP(__prop, __val) \
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((__val) << BFI_ADAPTER_ ## __prop ## _SH)
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#define BFI_ADAPTER_IS_PROTO(__adap_type) \
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((__adap_type) & BFI_ADAPTER_PROTO)
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#define BFI_ADAPTER_IS_TTV(__adap_type) \
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((__adap_type) & BFI_ADAPTER_TTV)
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#define BFI_ADAPTER_IS_UNSUPP(__adap_type) \
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((__adap_type) & BFI_ADAPTER_UNSUPP)
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#define BFI_ADAPTER_IS_SPECIAL(__adap_type) \
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((__adap_type) & (BFI_ADAPTER_TTV | BFI_ADAPTER_PROTO | \
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BFI_ADAPTER_UNSUPP))
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/**
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* BFI_IOC_H2I_ENABLE_REQ & BFI_IOC_H2I_DISABLE_REQ messages
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*/
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struct bfi_ioc_ctrl_req_s {
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struct bfi_mhdr_s mh;
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u8 ioc_class;
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u8 rsvd[3];
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};
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/**
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* BFI_IOC_I2H_ENABLE_REPLY & BFI_IOC_I2H_DISABLE_REPLY messages
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*/
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struct bfi_ioc_ctrl_reply_s {
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struct bfi_mhdr_s mh; /* Common msg header */
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u8 status; /* enable/disable status */
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u8 rsvd[3];
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};
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#define BFI_IOC_MSGSZ 8
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/**
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* H2I Messages
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*/
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union bfi_ioc_h2i_msg_u {
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struct bfi_mhdr_s mh;
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struct bfi_ioc_ctrl_req_s enable_req;
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struct bfi_ioc_ctrl_req_s disable_req;
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struct bfi_ioc_getattr_req_s getattr_req;
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u32 mboxmsg[BFI_IOC_MSGSZ];
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};
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/**
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* I2H Messages
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*/
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union bfi_ioc_i2h_msg_u {
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struct bfi_mhdr_s mh;
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struct bfi_ioc_rdy_event_s rdy_event;
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u32 mboxmsg[BFI_IOC_MSGSZ];
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};
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#pragma pack()
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#endif /* __BFI_IOC_H__ */
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