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Writes to TLBACC cause TLBMISC way to be incremented, which can be used to iterate over ways in a set, then wrap back to zero ready for the next set. This reduces register writes significantly. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> |
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cacheflush.c | ||
dma-mapping.c | ||
extable.c | ||
fault.c | ||
init.c | ||
ioremap.c | ||
Makefile | ||
mmu_context.c | ||
pgtable.c | ||
tlb.c | ||
uaccess.c |