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732f3ca7d4
Mathieu Desnoyers revealed a bug in the original code. The nop that is used to relpace the mcount caller can be a two part nop. This runs the risk where a process can be preempted after executing the first nop, but before the second part of the nop. The ftrace code calls kstop_machine to keep multiple CPUs from executing code that is being modified, but it does not protect against a task preempting in the middle of a two part nop. If the above preemption happens and the tracer is enabled, after the kstop_machine runs, all those nops will be calls to the trace function. If the preempted process that was preempted between the two nops is executed again, it will execute half of the call to the trace function, and this might crash the system. This patch instead uses what both the latest Intel and AMD spec suggests. That is the P6_NOP5 sequence of "0x0f 0x1f 0x44 0x00 0x00". Note, some older CPUs and QEMU might fault on this nop, so this nop is executed with fault handling first. If it detects a fault, it will then use the code "0x66 0x66 0x66 0x66 0x90". If that faults, it will then default to a simple "jmp 1f; .byte 0x00 0x00 0x00; 1:". The jmp is not optimal but will do if the first two can not be executed. TODO: Examine the cpuid to determine the nop to use. Signed-off-by: Steven Rostedt <srostedt@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
186 lines
4.4 KiB
C
186 lines
4.4 KiB
C
/*
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* Code for replacing ftrace calls with jumps.
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*
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* Copyright (C) 2007-2008 Steven Rostedt <srostedt@redhat.com>
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*
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* Thanks goes to Ingo Molnar, for suggesting the idea.
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* Mathieu Desnoyers, for suggesting postponing the modifications.
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* Arjan van de Ven, for keeping me straight, and explaining to me
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* the dangers of modifying code on the run.
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*/
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#include <linux/spinlock.h>
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#include <linux/hardirq.h>
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#include <linux/ftrace.h>
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#include <linux/percpu.h>
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#include <linux/init.h>
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#include <linux/list.h>
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#include <asm/ftrace.h>
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#include <asm/nops.h>
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/* Long is fine, even if it is only 4 bytes ;-) */
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static long *ftrace_nop;
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union ftrace_code_union {
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char code[MCOUNT_INSN_SIZE];
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struct {
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char e8;
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int offset;
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} __attribute__((packed));
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};
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static int notrace ftrace_calc_offset(long ip, long addr)
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{
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return (int)(addr - ip);
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}
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notrace unsigned char *ftrace_nop_replace(void)
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{
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return (char *)ftrace_nop;
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}
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notrace unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
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{
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static union ftrace_code_union calc;
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calc.e8 = 0xe8;
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calc.offset = ftrace_calc_offset(ip + MCOUNT_INSN_SIZE, addr);
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/*
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* No locking needed, this must be called via kstop_machine
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* which in essence is like running on a uniprocessor machine.
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*/
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return calc.code;
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}
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notrace int
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ftrace_modify_code(unsigned long ip, unsigned char *old_code,
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unsigned char *new_code)
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{
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unsigned replaced;
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unsigned old = *(unsigned *)old_code; /* 4 bytes */
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unsigned new = *(unsigned *)new_code; /* 4 bytes */
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unsigned char newch = new_code[4];
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int faulted = 0;
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/*
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* Note: Due to modules and __init, code can
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* disappear and change, we need to protect against faulting
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* as well as code changing.
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*
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* No real locking needed, this code is run through
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* kstop_machine.
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*/
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asm volatile (
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"1: lock\n"
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" cmpxchg %3, (%2)\n"
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" jnz 2f\n"
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" movb %b4, 4(%2)\n"
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"2:\n"
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".section .fixup, \"ax\"\n"
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"3: movl $1, %0\n"
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" jmp 2b\n"
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".previous\n"
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_ASM_EXTABLE(1b, 3b)
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: "=r"(faulted), "=a"(replaced)
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: "r"(ip), "r"(new), "c"(newch),
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"0"(faulted), "a"(old)
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: "memory");
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sync_core();
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if (replaced != old && replaced != new)
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faulted = 2;
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return faulted;
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}
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notrace int ftrace_update_ftrace_func(ftrace_func_t func)
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{
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unsigned long ip = (unsigned long)(&ftrace_call);
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unsigned char old[MCOUNT_INSN_SIZE], *new;
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int ret;
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memcpy(old, &ftrace_call, MCOUNT_INSN_SIZE);
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new = ftrace_call_replace(ip, (unsigned long)func);
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ret = ftrace_modify_code(ip, old, new);
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return ret;
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}
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notrace int ftrace_mcount_set(unsigned long *data)
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{
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/* mcount is initialized as a nop */
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*data = 0;
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return 0;
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}
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int __init ftrace_dyn_arch_init(void *data)
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{
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extern const unsigned char ftrace_test_p6nop[];
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extern const unsigned char ftrace_test_nop5[];
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extern const unsigned char ftrace_test_jmp[];
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int faulted = 0;
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/*
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* There is no good nop for all x86 archs.
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* We will default to using the P6_NOP5, but first we
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* will test to make sure that the nop will actually
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* work on this CPU. If it faults, we will then
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* go to a lesser efficient 5 byte nop. If that fails
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* we then just use a jmp as our nop. This isn't the most
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* efficient nop, but we can not use a multi part nop
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* since we would then risk being preempted in the middle
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* of that nop, and if we enabled tracing then, it might
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* cause a system crash.
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*
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* TODO: check the cpuid to determine the best nop.
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*/
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asm volatile (
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"jmp ftrace_test_jmp\n"
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/* This code needs to stay around */
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".section .text, \"ax\"\n"
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"ftrace_test_jmp:"
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"jmp ftrace_test_p6nop\n"
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".byte 0x00,0x00,0x00\n" /* 2 byte jmp + 3 bytes */
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"ftrace_test_p6nop:"
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P6_NOP5
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"jmp 1f\n"
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"ftrace_test_nop5:"
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".byte 0x66,0x66,0x66,0x66,0x90\n"
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"jmp 1f\n"
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".previous\n"
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"1:"
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".section .fixup, \"ax\"\n"
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"2: movl $1, %0\n"
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" jmp ftrace_test_nop5\n"
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"3: movl $2, %0\n"
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" jmp 1b\n"
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".previous\n"
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_ASM_EXTABLE(ftrace_test_p6nop, 2b)
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_ASM_EXTABLE(ftrace_test_nop5, 3b)
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: "=r"(faulted) : "0" (faulted));
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switch (faulted) {
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case 0:
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pr_info("ftrace: converting mcount calls to 0f 1f 44 00 00\n");
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ftrace_nop = (unsigned long *)ftrace_test_p6nop;
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break;
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case 1:
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pr_info("ftrace: converting mcount calls to 66 66 66 66 90\n");
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ftrace_nop = (unsigned long *)ftrace_test_nop5;
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break;
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case 2:
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pr_info("ftrace: converting mcount calls to jmp 1f\n");
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ftrace_nop = (unsigned long *)ftrace_test_jmp;
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break;
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}
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/* The return code is retured via data */
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*(unsigned long *)data = 0;
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return 0;
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}
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