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72e5706aa7
linux/drivers/pinctrl/uniphier
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Masahiro Yamada 72e5706aa7 pinctrl: uniphier: support 3-bit drive strength control 
The new ARMv8 SoC, PH1-LD20, supports more fine-grained drive
strength control.  Drive strength of some pins are controlled by
3-bit width registers (8-level granularity).

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31 12:46:18 +02:00
..
Kconfig pinctrl: uniphier: rename CONFIG options and file names 2016-03-09 10:39:30 +07:00
Makefile pinctrl: uniphier: rename CONFIG options and file names 2016-03-09 10:39:30 +07:00
pinctrl-uniphier-core.c pinctrl: uniphier: support 3-bit drive strength control 2016-05-31 12:46:18 +02:00
pinctrl-uniphier-ld4.c pinctrl: uniphier: rename macros for drive strength control 2016-05-31 12:42:04 +02:00
pinctrl-uniphier-ld6b.c pinctrl: uniphier: rename macros for drive strength control 2016-05-31 12:42:04 +02:00
pinctrl-uniphier-pro4.c pinctrl: uniphier: rename macros for drive strength control 2016-05-31 12:42:04 +02:00
pinctrl-uniphier-pro5.c pinctrl: uniphier: rename macros for drive strength control 2016-05-31 12:42:04 +02:00
pinctrl-uniphier-pxs2.c pinctrl: uniphier: rename macros for drive strength control 2016-05-31 12:42:04 +02:00
pinctrl-uniphier-sld8.c pinctrl: uniphier: rename macros for drive strength control 2016-05-31 12:42:04 +02:00
pinctrl-uniphier.h pinctrl: uniphier: support 3-bit drive strength control 2016-05-31 12:46:18 +02:00