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Define the pinmuxing and pindrive tables for tegra30. The pinmux table defines the available functions for each pinmux group. The pindrive table defines the default pullup or pulldowns for each group. Derived from code by Scott Williams (scwilliams@nvidia.com) Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Colin Cross <ccross@android.com> Signed-off-by: Olof Johansson <olof@lixom.net>
321 lines
8.3 KiB
C
321 lines
8.3 KiB
C
/*
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* linux/arch/arm/mach-tegra/include/mach/pinmux-tegra30.h
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*
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* Copyright (C) 2010 Google, Inc.
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* Copyright (C) 2010,2011 Nvidia, Inc.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __MACH_TEGRA_PINMUX_TEGRA30_H
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#define __MACH_TEGRA_PINMUX_TEGRA30_H
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enum tegra_pingroup {
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TEGRA_PINGROUP_ULPI_DATA0 = 0,
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TEGRA_PINGROUP_ULPI_DATA1,
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TEGRA_PINGROUP_ULPI_DATA2,
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TEGRA_PINGROUP_ULPI_DATA3,
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TEGRA_PINGROUP_ULPI_DATA4,
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TEGRA_PINGROUP_ULPI_DATA5,
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TEGRA_PINGROUP_ULPI_DATA6,
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TEGRA_PINGROUP_ULPI_DATA7,
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TEGRA_PINGROUP_ULPI_CLK,
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TEGRA_PINGROUP_ULPI_DIR,
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TEGRA_PINGROUP_ULPI_NXT,
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TEGRA_PINGROUP_ULPI_STP,
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TEGRA_PINGROUP_DAP3_FS,
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TEGRA_PINGROUP_DAP3_DIN,
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TEGRA_PINGROUP_DAP3_DOUT,
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TEGRA_PINGROUP_DAP3_SCLK,
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TEGRA_PINGROUP_GPIO_PV0,
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TEGRA_PINGROUP_GPIO_PV1,
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TEGRA_PINGROUP_SDMMC1_CLK,
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TEGRA_PINGROUP_SDMMC1_CMD,
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TEGRA_PINGROUP_SDMMC1_DAT3,
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TEGRA_PINGROUP_SDMMC1_DAT2,
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TEGRA_PINGROUP_SDMMC1_DAT1,
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TEGRA_PINGROUP_SDMMC1_DAT0,
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TEGRA_PINGROUP_GPIO_PV2,
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TEGRA_PINGROUP_GPIO_PV3,
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TEGRA_PINGROUP_CLK2_OUT,
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TEGRA_PINGROUP_CLK2_REQ,
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TEGRA_PINGROUP_LCD_PWR1,
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TEGRA_PINGROUP_LCD_PWR2,
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TEGRA_PINGROUP_LCD_SDIN,
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TEGRA_PINGROUP_LCD_SDOUT,
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TEGRA_PINGROUP_LCD_WR_N,
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TEGRA_PINGROUP_LCD_CS0_N,
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TEGRA_PINGROUP_LCD_DC0,
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TEGRA_PINGROUP_LCD_SCK,
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TEGRA_PINGROUP_LCD_PWR0,
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TEGRA_PINGROUP_LCD_PCLK,
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TEGRA_PINGROUP_LCD_DE,
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TEGRA_PINGROUP_LCD_HSYNC,
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TEGRA_PINGROUP_LCD_VSYNC,
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TEGRA_PINGROUP_LCD_D0,
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TEGRA_PINGROUP_LCD_D1,
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TEGRA_PINGROUP_LCD_D2,
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TEGRA_PINGROUP_LCD_D3,
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TEGRA_PINGROUP_LCD_D4,
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TEGRA_PINGROUP_LCD_D5,
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TEGRA_PINGROUP_LCD_D6,
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TEGRA_PINGROUP_LCD_D7,
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TEGRA_PINGROUP_LCD_D8,
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TEGRA_PINGROUP_LCD_D9,
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TEGRA_PINGROUP_LCD_D10,
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TEGRA_PINGROUP_LCD_D11,
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TEGRA_PINGROUP_LCD_D12,
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TEGRA_PINGROUP_LCD_D13,
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TEGRA_PINGROUP_LCD_D14,
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TEGRA_PINGROUP_LCD_D15,
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TEGRA_PINGROUP_LCD_D16,
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TEGRA_PINGROUP_LCD_D17,
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TEGRA_PINGROUP_LCD_D18,
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TEGRA_PINGROUP_LCD_D19,
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TEGRA_PINGROUP_LCD_D20,
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TEGRA_PINGROUP_LCD_D21,
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TEGRA_PINGROUP_LCD_D22,
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TEGRA_PINGROUP_LCD_D23,
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TEGRA_PINGROUP_LCD_CS1_N,
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TEGRA_PINGROUP_LCD_M1,
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TEGRA_PINGROUP_LCD_DC1,
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TEGRA_PINGROUP_HDMI_INT,
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TEGRA_PINGROUP_DDC_SCL,
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TEGRA_PINGROUP_DDC_SDA,
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TEGRA_PINGROUP_CRT_HSYNC,
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TEGRA_PINGROUP_CRT_VSYNC,
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TEGRA_PINGROUP_VI_D0,
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TEGRA_PINGROUP_VI_D1,
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TEGRA_PINGROUP_VI_D2,
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TEGRA_PINGROUP_VI_D3,
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TEGRA_PINGROUP_VI_D4,
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TEGRA_PINGROUP_VI_D5,
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TEGRA_PINGROUP_VI_D6,
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TEGRA_PINGROUP_VI_D7,
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TEGRA_PINGROUP_VI_D8,
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TEGRA_PINGROUP_VI_D9,
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TEGRA_PINGROUP_VI_D10,
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TEGRA_PINGROUP_VI_D11,
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TEGRA_PINGROUP_VI_PCLK,
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TEGRA_PINGROUP_VI_MCLK,
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TEGRA_PINGROUP_VI_VSYNC,
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TEGRA_PINGROUP_VI_HSYNC,
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TEGRA_PINGROUP_UART2_RXD,
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TEGRA_PINGROUP_UART2_TXD,
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TEGRA_PINGROUP_UART2_RTS_N,
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TEGRA_PINGROUP_UART2_CTS_N,
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TEGRA_PINGROUP_UART3_TXD,
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TEGRA_PINGROUP_UART3_RXD,
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TEGRA_PINGROUP_UART3_CTS_N,
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TEGRA_PINGROUP_UART3_RTS_N,
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TEGRA_PINGROUP_GPIO_PU0,
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TEGRA_PINGROUP_GPIO_PU1,
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TEGRA_PINGROUP_GPIO_PU2,
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TEGRA_PINGROUP_GPIO_PU3,
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TEGRA_PINGROUP_GPIO_PU4,
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TEGRA_PINGROUP_GPIO_PU5,
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TEGRA_PINGROUP_GPIO_PU6,
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TEGRA_PINGROUP_GEN1_I2C_SDA,
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TEGRA_PINGROUP_GEN1_I2C_SCL,
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TEGRA_PINGROUP_DAP4_FS,
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TEGRA_PINGROUP_DAP4_DIN,
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TEGRA_PINGROUP_DAP4_DOUT,
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TEGRA_PINGROUP_DAP4_SCLK,
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TEGRA_PINGROUP_CLK3_OUT,
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TEGRA_PINGROUP_CLK3_REQ,
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TEGRA_PINGROUP_GMI_WP_N,
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TEGRA_PINGROUP_GMI_IORDY,
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TEGRA_PINGROUP_GMI_WAIT,
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TEGRA_PINGROUP_GMI_ADV_N,
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TEGRA_PINGROUP_GMI_CLK,
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TEGRA_PINGROUP_GMI_CS0_N,
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TEGRA_PINGROUP_GMI_CS1_N,
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TEGRA_PINGROUP_GMI_CS2_N,
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TEGRA_PINGROUP_GMI_CS3_N,
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TEGRA_PINGROUP_GMI_CS4_N,
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TEGRA_PINGROUP_GMI_CS6_N,
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TEGRA_PINGROUP_GMI_CS7_N,
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TEGRA_PINGROUP_GMI_AD0,
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TEGRA_PINGROUP_GMI_AD1,
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TEGRA_PINGROUP_GMI_AD2,
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TEGRA_PINGROUP_GMI_AD3,
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TEGRA_PINGROUP_GMI_AD4,
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TEGRA_PINGROUP_GMI_AD5,
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TEGRA_PINGROUP_GMI_AD6,
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TEGRA_PINGROUP_GMI_AD7,
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TEGRA_PINGROUP_GMI_AD8,
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TEGRA_PINGROUP_GMI_AD9,
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TEGRA_PINGROUP_GMI_AD10,
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TEGRA_PINGROUP_GMI_AD11,
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TEGRA_PINGROUP_GMI_AD12,
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TEGRA_PINGROUP_GMI_AD13,
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TEGRA_PINGROUP_GMI_AD14,
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TEGRA_PINGROUP_GMI_AD15,
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TEGRA_PINGROUP_GMI_A16,
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TEGRA_PINGROUP_GMI_A17,
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TEGRA_PINGROUP_GMI_A18,
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TEGRA_PINGROUP_GMI_A19,
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TEGRA_PINGROUP_GMI_WR_N,
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TEGRA_PINGROUP_GMI_OE_N,
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TEGRA_PINGROUP_GMI_DQS,
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TEGRA_PINGROUP_GMI_RST_N,
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TEGRA_PINGROUP_GEN2_I2C_SCL,
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TEGRA_PINGROUP_GEN2_I2C_SDA,
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TEGRA_PINGROUP_SDMMC4_CLK,
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TEGRA_PINGROUP_SDMMC4_CMD,
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TEGRA_PINGROUP_SDMMC4_DAT0,
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TEGRA_PINGROUP_SDMMC4_DAT1,
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TEGRA_PINGROUP_SDMMC4_DAT2,
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TEGRA_PINGROUP_SDMMC4_DAT3,
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TEGRA_PINGROUP_SDMMC4_DAT4,
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TEGRA_PINGROUP_SDMMC4_DAT5,
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TEGRA_PINGROUP_SDMMC4_DAT6,
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TEGRA_PINGROUP_SDMMC4_DAT7,
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TEGRA_PINGROUP_SDMMC4_RST_N,
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TEGRA_PINGROUP_CAM_MCLK,
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TEGRA_PINGROUP_GPIO_PCC1,
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TEGRA_PINGROUP_GPIO_PBB0,
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TEGRA_PINGROUP_CAM_I2C_SCL,
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TEGRA_PINGROUP_CAM_I2C_SDA,
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TEGRA_PINGROUP_GPIO_PBB3,
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TEGRA_PINGROUP_GPIO_PBB4,
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TEGRA_PINGROUP_GPIO_PBB5,
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TEGRA_PINGROUP_GPIO_PBB6,
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TEGRA_PINGROUP_GPIO_PBB7,
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TEGRA_PINGROUP_GPIO_PCC2,
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TEGRA_PINGROUP_JTAG_RTCK,
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TEGRA_PINGROUP_PWR_I2C_SCL,
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TEGRA_PINGROUP_PWR_I2C_SDA,
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TEGRA_PINGROUP_KB_ROW0,
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TEGRA_PINGROUP_KB_ROW1,
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TEGRA_PINGROUP_KB_ROW2,
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TEGRA_PINGROUP_KB_ROW3,
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TEGRA_PINGROUP_KB_ROW4,
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TEGRA_PINGROUP_KB_ROW5,
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TEGRA_PINGROUP_KB_ROW6,
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TEGRA_PINGROUP_KB_ROW7,
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TEGRA_PINGROUP_KB_ROW8,
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TEGRA_PINGROUP_KB_ROW9,
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TEGRA_PINGROUP_KB_ROW10,
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TEGRA_PINGROUP_KB_ROW11,
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TEGRA_PINGROUP_KB_ROW12,
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TEGRA_PINGROUP_KB_ROW13,
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TEGRA_PINGROUP_KB_ROW14,
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TEGRA_PINGROUP_KB_ROW15,
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TEGRA_PINGROUP_KB_COL0,
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TEGRA_PINGROUP_KB_COL1,
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TEGRA_PINGROUP_KB_COL2,
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TEGRA_PINGROUP_KB_COL3,
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TEGRA_PINGROUP_KB_COL4,
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TEGRA_PINGROUP_KB_COL5,
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TEGRA_PINGROUP_KB_COL6,
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TEGRA_PINGROUP_KB_COL7,
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TEGRA_PINGROUP_CLK_32K_OUT,
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TEGRA_PINGROUP_SYS_CLK_REQ,
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TEGRA_PINGROUP_CORE_PWR_REQ,
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TEGRA_PINGROUP_CPU_PWR_REQ,
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TEGRA_PINGROUP_PWR_INT_N,
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TEGRA_PINGROUP_CLK_32K_IN,
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TEGRA_PINGROUP_OWR,
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TEGRA_PINGROUP_DAP1_FS,
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TEGRA_PINGROUP_DAP1_DIN,
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TEGRA_PINGROUP_DAP1_DOUT,
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TEGRA_PINGROUP_DAP1_SCLK,
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TEGRA_PINGROUP_CLK1_REQ,
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TEGRA_PINGROUP_CLK1_OUT,
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TEGRA_PINGROUP_SPDIF_IN,
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TEGRA_PINGROUP_SPDIF_OUT,
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TEGRA_PINGROUP_DAP2_FS,
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TEGRA_PINGROUP_DAP2_DIN,
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TEGRA_PINGROUP_DAP2_DOUT,
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TEGRA_PINGROUP_DAP2_SCLK,
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TEGRA_PINGROUP_SPI2_MOSI,
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TEGRA_PINGROUP_SPI2_MISO,
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TEGRA_PINGROUP_SPI2_CS0_N,
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TEGRA_PINGROUP_SPI2_SCK,
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TEGRA_PINGROUP_SPI1_MOSI,
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TEGRA_PINGROUP_SPI1_SCK,
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TEGRA_PINGROUP_SPI1_CS0_N,
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TEGRA_PINGROUP_SPI1_MISO,
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TEGRA_PINGROUP_SPI2_CS1_N,
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TEGRA_PINGROUP_SPI2_CS2_N,
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TEGRA_PINGROUP_SDMMC3_CLK,
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TEGRA_PINGROUP_SDMMC3_CMD,
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TEGRA_PINGROUP_SDMMC3_DAT0,
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TEGRA_PINGROUP_SDMMC3_DAT1,
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TEGRA_PINGROUP_SDMMC3_DAT2,
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TEGRA_PINGROUP_SDMMC3_DAT3,
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TEGRA_PINGROUP_SDMMC3_DAT4,
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TEGRA_PINGROUP_SDMMC3_DAT5,
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TEGRA_PINGROUP_SDMMC3_DAT6,
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TEGRA_PINGROUP_SDMMC3_DAT7,
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TEGRA_PINGROUP_PEX_L0_PRSNT_N,
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TEGRA_PINGROUP_PEX_L0_RST_N,
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TEGRA_PINGROUP_PEX_L0_CLKREQ_N,
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TEGRA_PINGROUP_PEX_WAKE_N,
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TEGRA_PINGROUP_PEX_L1_PRSNT_N,
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TEGRA_PINGROUP_PEX_L1_RST_N,
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TEGRA_PINGROUP_PEX_L1_CLKREQ_N,
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TEGRA_PINGROUP_PEX_L2_PRSNT_N,
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TEGRA_PINGROUP_PEX_L2_RST_N,
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TEGRA_PINGROUP_PEX_L2_CLKREQ_N,
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TEGRA_PINGROUP_HDMI_CEC,
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TEGRA_MAX_PINGROUP,
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};
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enum tegra_drive_pingroup {
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TEGRA_DRIVE_PINGROUP_AO1 = 0,
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TEGRA_DRIVE_PINGROUP_AO2,
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TEGRA_DRIVE_PINGROUP_AT1,
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TEGRA_DRIVE_PINGROUP_AT2,
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TEGRA_DRIVE_PINGROUP_AT3,
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TEGRA_DRIVE_PINGROUP_AT4,
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TEGRA_DRIVE_PINGROUP_AT5,
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TEGRA_DRIVE_PINGROUP_CDEV1,
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TEGRA_DRIVE_PINGROUP_CDEV2,
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TEGRA_DRIVE_PINGROUP_CSUS,
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TEGRA_DRIVE_PINGROUP_DAP1,
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TEGRA_DRIVE_PINGROUP_DAP2,
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TEGRA_DRIVE_PINGROUP_DAP3,
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TEGRA_DRIVE_PINGROUP_DAP4,
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TEGRA_DRIVE_PINGROUP_DBG,
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TEGRA_DRIVE_PINGROUP_LCD1,
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TEGRA_DRIVE_PINGROUP_LCD2,
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TEGRA_DRIVE_PINGROUP_SDIO2,
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TEGRA_DRIVE_PINGROUP_SDIO3,
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TEGRA_DRIVE_PINGROUP_SPI,
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TEGRA_DRIVE_PINGROUP_UAA,
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TEGRA_DRIVE_PINGROUP_UAB,
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TEGRA_DRIVE_PINGROUP_UART2,
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TEGRA_DRIVE_PINGROUP_UART3,
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TEGRA_DRIVE_PINGROUP_VI1,
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TEGRA_DRIVE_PINGROUP_SDIO1,
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TEGRA_DRIVE_PINGROUP_CRT,
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TEGRA_DRIVE_PINGROUP_DDC,
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TEGRA_DRIVE_PINGROUP_GMA,
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TEGRA_DRIVE_PINGROUP_GMB,
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TEGRA_DRIVE_PINGROUP_GMC,
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TEGRA_DRIVE_PINGROUP_GMD,
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TEGRA_DRIVE_PINGROUP_GME,
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TEGRA_DRIVE_PINGROUP_GMF,
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TEGRA_DRIVE_PINGROUP_GMG,
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TEGRA_DRIVE_PINGROUP_GMH,
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TEGRA_DRIVE_PINGROUP_OWR,
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TEGRA_DRIVE_PINGROUP_UAD,
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TEGRA_DRIVE_PINGROUP_GPV,
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TEGRA_DRIVE_PINGROUP_DEV3,
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TEGRA_DRIVE_PINGROUP_CEC,
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TEGRA_MAX_DRIVE_PINGROUP,
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};
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#endif
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