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89ab396d71
We should hold the reference returned by of_get_parent() and use it to call of_node_put() for refcount balance. Fixes:88e2da8124("clk: meson: aoclk: refactor common code into dedicated file") Fixes:6682bd4d44("clk: meson: factorise meson64 peripheral clock controller drivers") Fixes:bb6eddd1d2("clk: meson: meson8b: use the HHI syscon if available") Signed-off-by: Liang He <windhl@126.com> Link: https://lore.kernel.org/r/20220628141038.168383-1-windhl@126.com Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
94 lines
2.4 KiB
C
94 lines
2.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Amlogic Meson-AXG Clock Controller Driver
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*
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* Copyright (c) 2016 BayLibre, SAS.
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*
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* Copyright (c) 2018 Amlogic, inc.
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* Author: Qiufang Dai <qiufang.dai@amlogic.com>
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* Author: Yixun Lan <yixun.lan@amlogic.com>
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*/
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#include <linux/platform_device.h>
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#include <linux/reset-controller.h>
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#include <linux/mfd/syscon.h>
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#include <linux/of_device.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include "meson-aoclk.h"
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static int meson_aoclk_do_reset(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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struct meson_aoclk_reset_controller *rstc =
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container_of(rcdev, struct meson_aoclk_reset_controller, reset);
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return regmap_write(rstc->regmap, rstc->data->reset_reg,
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BIT(rstc->data->reset[id]));
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}
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static const struct reset_control_ops meson_aoclk_reset_ops = {
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.reset = meson_aoclk_do_reset,
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};
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int meson_aoclkc_probe(struct platform_device *pdev)
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{
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struct meson_aoclk_reset_controller *rstc;
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struct meson_aoclk_data *data;
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struct device *dev = &pdev->dev;
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struct device_node *np;
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struct regmap *regmap;
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int ret, clkid;
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data = (struct meson_aoclk_data *) of_device_get_match_data(dev);
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if (!data)
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return -ENODEV;
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rstc = devm_kzalloc(dev, sizeof(*rstc), GFP_KERNEL);
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if (!rstc)
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return -ENOMEM;
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np = of_get_parent(dev->of_node);
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regmap = syscon_node_to_regmap(np);
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of_node_put(np);
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if (IS_ERR(regmap)) {
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dev_err(dev, "failed to get regmap\n");
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return PTR_ERR(regmap);
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}
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/* Reset Controller */
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rstc->data = data;
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rstc->regmap = regmap;
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rstc->reset.ops = &meson_aoclk_reset_ops;
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rstc->reset.nr_resets = data->num_reset;
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rstc->reset.of_node = dev->of_node;
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ret = devm_reset_controller_register(dev, &rstc->reset);
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if (ret) {
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dev_err(dev, "failed to register reset controller\n");
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return ret;
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}
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/* Populate regmap */
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for (clkid = 0; clkid < data->num_clks; clkid++)
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data->clks[clkid]->map = regmap;
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/* Register all clks */
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for (clkid = 0; clkid < data->hw_data->num; clkid++) {
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if (!data->hw_data->hws[clkid])
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continue;
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ret = devm_clk_hw_register(dev, data->hw_data->hws[clkid]);
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if (ret) {
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dev_err(dev, "Clock registration failed\n");
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return ret;
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}
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}
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return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
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(void *) data->hw_data);
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}
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EXPORT_SYMBOL_GPL(meson_aoclkc_probe);
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MODULE_LICENSE("GPL v2");
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