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'interrupt-parent' is often documented as part of define bindings, but it is really outside the scope of a device binding. It's never required in a given node as it is often inherited from a parent node. Or it can be implicit if a parent node is an 'interrupt-controller' node. So remove it from all the binding files. Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
148 lines
4.4 KiB
Plaintext
148 lines
4.4 KiB
Plaintext
Davinci/Keystone GPIO controller bindings
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Required Properties:
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- compatible: should be "ti,dm6441-gpio": for Davinci da850 SoCs
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"ti,keystone-gpio": for Keystone 2 66AK2H/K, 66AK2L,
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66AK2E SoCs
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"ti,k2g-gpio", "ti,keystone-gpio": for 66AK2G
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- reg: Physical base address of the controller and the size of memory mapped
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registers.
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- gpio-controller : Marks the device node as a gpio controller.
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- #gpio-cells : Should be two.
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- first cell is the pin number
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- second cell is used to specify optional parameters (unused)
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- interrupts: Array of GPIO interrupt number. Only banked or unbanked IRQs are
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supported at a time.
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- ti,ngpio: The number of GPIO pins supported.
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- ti,davinci-gpio-unbanked: The number of GPIOs that have an individual interrupt
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line to processor.
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- clocks: Should contain the device's input clock, and should be defined as per
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the appropriate clock bindings consumer usage in,
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Documentation/devicetree/bindings/clock/keystone-gate.txt
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for 66AK2HK/66AK2L/66AK2E SoCs or,
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Documentation/devicetree/bindings/clock/ti,sci-clk.txt
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for 66AK2G SoCs
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- clock-names: Name should be "gpio";
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Currently clock-names and clocks are needed for all keystone 2 platforms
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Davinci platforms do not have DT clocks as of now.
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The GPIO controller also acts as an interrupt controller. It uses the default
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two cells specifier as described in Documentation/devicetree/bindings/
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interrupt-controller/interrupts.txt.
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Example:
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gpio: gpio@1e26000 {
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compatible = "ti,dm6441-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x226000 0x1000>;
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interrupt-parent = <&intc>;
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interrupts = <42 IRQ_TYPE_EDGE_BOTH 43 IRQ_TYPE_EDGE_BOTH
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44 IRQ_TYPE_EDGE_BOTH 45 IRQ_TYPE_EDGE_BOTH
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46 IRQ_TYPE_EDGE_BOTH 47 IRQ_TYPE_EDGE_BOTH
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48 IRQ_TYPE_EDGE_BOTH 49 IRQ_TYPE_EDGE_BOTH
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50 IRQ_TYPE_EDGE_BOTH>;
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ti,ngpio = <144>;
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ti,davinci-gpio-unbanked = <0>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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leds {
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compatible = "gpio-leds";
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led1 {
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label = "davinci:green:usr1";
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gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
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...
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};
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led2 {
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label = "davinci:red:debug1";
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gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
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...
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};
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};
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Example for 66AK2G:
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gpio0: gpio@2603000 {
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compatible = "ti,k2g-gpio", "ti,keystone-gpio";
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reg = <0x02603000 0x100>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 433 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 434 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 435 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 436 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 437 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 438 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 439 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 440 IRQ_TYPE_EDGE_RISING>;
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interrupt-controller;
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#interrupt-cells = <2>;
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ti,ngpio = <144>;
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ti,davinci-gpio-unbanked = <0>;
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clocks = <&k2g_clks 0x001b 0x0>;
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clock-names = "gpio";
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};
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Example for 66AK2HK/66AK2L/66AK2E:
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gpio0: gpio@260bf00 {
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compatible = "ti,keystone-gpio";
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reg = <0x0260bf00 0x100>;
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gpio-controller;
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#gpio-cells = <2>;
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/* HW Interrupts mapped to GPIO pins */
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interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 121 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 122 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 123 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 124 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 125 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 126 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 127 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 128 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 129 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 130 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 131 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 132 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 133 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 135 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 136 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 137 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 138 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 139 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 140 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 141 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 142 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 143 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 144 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 145 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 146 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 147 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 148 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 150 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clkgpio>;
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clock-names = "gpio";
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ti,ngpio = <32>;
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ti,davinci-gpio-unbanked = <32>;
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};
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