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81d7cac4d1
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring <robh@kernel.org> [mpe: Fixup maple/setup.c which needs platform_device] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20230724210247.778034-1-robh@kernel.org
107 lines
2.4 KiB
C
107 lines
2.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Routines common to most mpc85xx-based boards.
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*/
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <asm/fsl_pm.h>
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#include <soc/fsl/qe/qe.h>
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#include <sysdev/cpm2_pic.h>
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#include "mpc85xx.h"
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const struct fsl_pm_ops *qoriq_pm_ops;
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static const struct of_device_id mpc85xx_common_ids[] __initconst = {
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{ .type = "soc", },
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{ .compatible = "soc", },
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{ .compatible = "simple-bus", },
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{ .name = "cpm", },
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{ .name = "localbus", },
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{ .compatible = "gianfar", },
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{ .compatible = "fsl,qe", },
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{ .compatible = "fsl,cpm2", },
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{ .compatible = "fsl,srio", },
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/* So that the DMA channel nodes can be probed individually: */
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{ .compatible = "fsl,eloplus-dma", },
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/* For the PMC driver */
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{ .compatible = "fsl,mpc8548-guts", },
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/* Probably unnecessary? */
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{ .compatible = "gpio-leds", },
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/* For all PCI controllers */
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{ .compatible = "fsl,mpc8540-pci", },
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{ .compatible = "fsl,mpc8548-pcie", },
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{ .compatible = "fsl,p1022-pcie", },
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{ .compatible = "fsl,p1010-pcie", },
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{ .compatible = "fsl,p1023-pcie", },
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{ .compatible = "fsl,p4080-pcie", },
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{ .compatible = "fsl,qoriq-pcie-v2.4", },
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{ .compatible = "fsl,qoriq-pcie-v2.3", },
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{ .compatible = "fsl,qoriq-pcie-v2.2", },
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{ .compatible = "fsl,fman", },
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{},
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};
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int __init mpc85xx_common_publish_devices(void)
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{
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return of_platform_bus_probe(NULL, mpc85xx_common_ids, NULL);
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}
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#ifdef CONFIG_CPM2
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static void cpm2_cascade(struct irq_desc *desc)
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{
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struct irq_chip *chip = irq_desc_get_chip(desc);
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int cascade_irq;
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while ((cascade_irq = cpm2_get_irq()) >= 0)
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generic_handle_irq(cascade_irq);
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chip->irq_eoi(&desc->irq_data);
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}
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void __init mpc85xx_cpm2_pic_init(void)
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{
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struct device_node *np;
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int irq;
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/* Setup CPM2 PIC */
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np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
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if (np == NULL) {
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printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
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return;
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}
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irq = irq_of_parse_and_map(np, 0);
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if (!irq) {
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of_node_put(np);
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printk(KERN_ERR "PIC init: got no IRQ for cpm cascade\n");
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return;
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}
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cpm2_pic_init(np);
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of_node_put(np);
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irq_set_chained_handler(irq, cpm2_cascade);
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}
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#endif
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#ifdef CONFIG_QUICC_ENGINE
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void __init mpc85xx_qe_par_io_init(void)
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{
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struct device_node *np;
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np = of_find_node_by_name(NULL, "par_io");
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if (np) {
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struct device_node *ucc;
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par_io_init(np);
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of_node_put(np);
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for_each_node_by_name(ucc, "ucc")
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par_io_of_config(ucc);
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}
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}
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#endif
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