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7050ec821c
Split rt2x00lib_write_tx_desc() up into a TX descriptor initializor and TX descriptor writer. This split is required to properly allow mac80211 to move its tx_control structure into the skb->cb array. The rt2x00queue_create_tx_descriptor() function will read all tx control information and convert it into a rt2x00 TX descriptor information structure. After that function is complete, we have all information we needed from the tx control structure and are free to start writing into the skb->cb array for our own purposes. rt2x00queue_write_tx_descriptor() will be in charge of really sending the TX descriptor to the hardware and kicking the TX queue. Signed-off-by: Ivo van Doorn <IvDoorn@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
462 lines
11 KiB
C
462 lines
11 KiB
C
/*
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Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
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<http://rt2x00.serialmonkey.com>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the
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Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/*
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Module: rt2x00lib
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Abstract: rt2x00 queue specific routines.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include "rt2x00.h"
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#include "rt2x00lib.h"
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void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
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struct txentry_desc *txdesc,
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struct ieee80211_tx_control *control)
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{
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struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
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struct ieee80211_rate *rate = control->tx_rate;
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const struct rt2x00_rate *hwrate;
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unsigned int data_length;
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unsigned int duration;
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unsigned int residual;
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u16 frame_control;
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memset(txdesc, 0, sizeof(*txdesc));
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/*
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* Initialize information from queue
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*/
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txdesc->queue = entry->queue->qid;
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txdesc->cw_min = entry->queue->cw_min;
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txdesc->cw_max = entry->queue->cw_max;
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txdesc->aifs = entry->queue->aifs;
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/* Data length should be extended with 4 bytes for CRC */
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data_length = entry->skb->len + 4;
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/*
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* Read required fields from ieee80211 header.
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*/
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frame_control = le16_to_cpu(hdr->frame_control);
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/*
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* Check whether this frame is to be acked.
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*/
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if (!(control->flags & IEEE80211_TXCTL_NO_ACK))
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__set_bit(ENTRY_TXD_ACK, &txdesc->flags);
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/*
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* Check if this is a RTS/CTS frame
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*/
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if (is_rts_frame(frame_control) || is_cts_frame(frame_control)) {
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__set_bit(ENTRY_TXD_BURST, &txdesc->flags);
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if (is_rts_frame(frame_control)) {
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__set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
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__set_bit(ENTRY_TXD_ACK, &txdesc->flags);
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} else {
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__set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
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__clear_bit(ENTRY_TXD_ACK, &txdesc->flags);
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}
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if (control->rts_cts_rate)
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rate = control->rts_cts_rate;
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}
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/*
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* Determine retry information.
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*/
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txdesc->retry_limit = control->retry_limit;
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if (control->flags & IEEE80211_TXCTL_LONG_RETRY_LIMIT)
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__set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
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/*
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* Check if more fragments are pending
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*/
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if (ieee80211_get_morefrag(hdr)) {
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__set_bit(ENTRY_TXD_BURST, &txdesc->flags);
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__set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
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}
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/*
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* Beacons and probe responses require the tsf timestamp
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* to be inserted into the frame.
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*/
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if (txdesc->queue == QID_BEACON || is_probe_resp(frame_control))
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__set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
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/*
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* Determine with what IFS priority this frame should be send.
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* Set ifs to IFS_SIFS when the this is not the first fragment,
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* or this fragment came after RTS/CTS.
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*/
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if (test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)) {
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txdesc->ifs = IFS_SIFS;
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} else if (control->flags & IEEE80211_TXCTL_FIRST_FRAGMENT) {
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__set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
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txdesc->ifs = IFS_BACKOFF;
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} else {
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txdesc->ifs = IFS_SIFS;
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}
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/*
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* PLCP setup
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* Length calculation depends on OFDM/CCK rate.
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*/
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hwrate = rt2x00_get_rate(rate->hw_value);
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txdesc->signal = hwrate->plcp;
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txdesc->service = 0x04;
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if (hwrate->flags & DEV_RATE_OFDM) {
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__set_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags);
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txdesc->length_high = (data_length >> 6) & 0x3f;
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txdesc->length_low = data_length & 0x3f;
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} else {
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/*
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* Convert length to microseconds.
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*/
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residual = get_duration_res(data_length, hwrate->bitrate);
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duration = get_duration(data_length, hwrate->bitrate);
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if (residual != 0) {
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duration++;
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/*
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* Check if we need to set the Length Extension
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*/
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if (hwrate->bitrate == 110 && residual <= 30)
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txdesc->service |= 0x80;
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}
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txdesc->length_high = (duration >> 8) & 0xff;
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txdesc->length_low = duration & 0xff;
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/*
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* When preamble is enabled we should set the
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* preamble bit for the signal.
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*/
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if (rt2x00_get_rate_preamble(rate->hw_value))
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txdesc->signal |= 0x08;
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}
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}
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EXPORT_SYMBOL_GPL(rt2x00queue_create_tx_descriptor);
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void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
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struct txentry_desc *txdesc)
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{
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struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
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struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
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rt2x00dev->ops->lib->write_tx_desc(rt2x00dev, entry->skb, txdesc);
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/*
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* All processing on the frame has been completed, this means
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* it is now ready to be dumped to userspace through debugfs.
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*/
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rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_TX, entry->skb);
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/*
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* We are done writing the frame to the queue entry,
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* if this entry is a RTS of CTS-to-self frame we are done,
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* otherwise we need to kick the queue.
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*/
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if (rt2x00dev->ops->lib->kick_tx_queue &&
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!(skbdesc->flags & FRAME_DESC_DRIVER_GENERATED))
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rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev,
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entry->queue->qid);
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}
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EXPORT_SYMBOL_GPL(rt2x00queue_write_tx_descriptor);
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struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev,
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const enum data_queue_qid queue)
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{
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int atim = test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
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if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx)
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return &rt2x00dev->tx[queue];
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if (!rt2x00dev->bcn)
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return NULL;
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if (queue == QID_BEACON)
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return &rt2x00dev->bcn[0];
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else if (queue == QID_ATIM && atim)
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return &rt2x00dev->bcn[1];
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return NULL;
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}
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EXPORT_SYMBOL_GPL(rt2x00queue_get_queue);
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struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
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enum queue_index index)
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{
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struct queue_entry *entry;
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unsigned long irqflags;
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if (unlikely(index >= Q_INDEX_MAX)) {
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ERROR(queue->rt2x00dev,
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"Entry requested from invalid index type (%d)\n", index);
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return NULL;
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}
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spin_lock_irqsave(&queue->lock, irqflags);
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entry = &queue->entries[queue->index[index]];
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spin_unlock_irqrestore(&queue->lock, irqflags);
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return entry;
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}
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EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
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void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index)
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{
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unsigned long irqflags;
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if (unlikely(index >= Q_INDEX_MAX)) {
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ERROR(queue->rt2x00dev,
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"Index change on invalid index type (%d)\n", index);
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return;
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}
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spin_lock_irqsave(&queue->lock, irqflags);
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queue->index[index]++;
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if (queue->index[index] >= queue->limit)
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queue->index[index] = 0;
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if (index == Q_INDEX) {
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queue->length++;
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} else if (index == Q_INDEX_DONE) {
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queue->length--;
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queue->count ++;
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}
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spin_unlock_irqrestore(&queue->lock, irqflags);
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}
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EXPORT_SYMBOL_GPL(rt2x00queue_index_inc);
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static void rt2x00queue_reset(struct data_queue *queue)
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{
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unsigned long irqflags;
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spin_lock_irqsave(&queue->lock, irqflags);
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queue->count = 0;
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queue->length = 0;
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memset(queue->index, 0, sizeof(queue->index));
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spin_unlock_irqrestore(&queue->lock, irqflags);
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}
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void rt2x00queue_init_rx(struct rt2x00_dev *rt2x00dev)
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{
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struct data_queue *queue = rt2x00dev->rx;
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unsigned int i;
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rt2x00queue_reset(queue);
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if (!rt2x00dev->ops->lib->init_rxentry)
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return;
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for (i = 0; i < queue->limit; i++)
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rt2x00dev->ops->lib->init_rxentry(rt2x00dev,
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&queue->entries[i]);
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}
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void rt2x00queue_init_tx(struct rt2x00_dev *rt2x00dev)
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{
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struct data_queue *queue;
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unsigned int i;
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txall_queue_for_each(rt2x00dev, queue) {
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rt2x00queue_reset(queue);
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if (!rt2x00dev->ops->lib->init_txentry)
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continue;
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for (i = 0; i < queue->limit; i++)
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rt2x00dev->ops->lib->init_txentry(rt2x00dev,
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&queue->entries[i]);
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}
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}
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static int rt2x00queue_alloc_entries(struct data_queue *queue,
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const struct data_queue_desc *qdesc)
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{
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struct queue_entry *entries;
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unsigned int entry_size;
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unsigned int i;
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rt2x00queue_reset(queue);
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queue->limit = qdesc->entry_num;
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queue->data_size = qdesc->data_size;
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queue->desc_size = qdesc->desc_size;
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/*
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* Allocate all queue entries.
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*/
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entry_size = sizeof(*entries) + qdesc->priv_size;
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entries = kzalloc(queue->limit * entry_size, GFP_KERNEL);
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if (!entries)
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return -ENOMEM;
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#define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
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( ((char *)(__base)) + ((__limit) * (__esize)) + \
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((__index) * (__psize)) )
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for (i = 0; i < queue->limit; i++) {
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entries[i].flags = 0;
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entries[i].queue = queue;
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entries[i].skb = NULL;
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entries[i].entry_idx = i;
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entries[i].priv_data =
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QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
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sizeof(*entries), qdesc->priv_size);
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}
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#undef QUEUE_ENTRY_PRIV_OFFSET
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queue->entries = entries;
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return 0;
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}
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int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
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{
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struct data_queue *queue;
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int status;
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status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
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if (status)
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goto exit;
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tx_queue_for_each(rt2x00dev, queue) {
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status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
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if (status)
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goto exit;
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}
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status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
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if (status)
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goto exit;
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if (!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags))
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return 0;
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status = rt2x00queue_alloc_entries(&rt2x00dev->bcn[1],
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rt2x00dev->ops->atim);
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if (status)
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goto exit;
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return 0;
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exit:
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ERROR(rt2x00dev, "Queue entries allocation failed.\n");
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rt2x00queue_uninitialize(rt2x00dev);
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return status;
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}
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void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
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{
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struct data_queue *queue;
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queue_for_each(rt2x00dev, queue) {
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kfree(queue->entries);
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queue->entries = NULL;
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}
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}
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static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
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struct data_queue *queue, enum data_queue_qid qid)
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{
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spin_lock_init(&queue->lock);
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queue->rt2x00dev = rt2x00dev;
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queue->qid = qid;
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queue->aifs = 2;
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queue->cw_min = 5;
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queue->cw_max = 10;
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}
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int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
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{
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struct data_queue *queue;
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enum data_queue_qid qid;
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unsigned int req_atim =
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!!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
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/*
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* We need the following queues:
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* RX: 1
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* TX: ops->tx_queues
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* Beacon: 1
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* Atim: 1 (if required)
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*/
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rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
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queue = kzalloc(rt2x00dev->data_queues * sizeof(*queue), GFP_KERNEL);
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if (!queue) {
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ERROR(rt2x00dev, "Queue allocation failed.\n");
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return -ENOMEM;
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}
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/*
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* Initialize pointers
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*/
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rt2x00dev->rx = queue;
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rt2x00dev->tx = &queue[1];
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rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
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/*
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* Initialize queue parameters.
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* RX: qid = QID_RX
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* TX: qid = QID_AC_BE + index
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* TX: cw_min: 2^5 = 32.
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* TX: cw_max: 2^10 = 1024.
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* BCN & Atim: qid = QID_MGMT
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*/
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rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
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qid = QID_AC_BE;
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tx_queue_for_each(rt2x00dev, queue)
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rt2x00queue_init(rt2x00dev, queue, qid++);
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rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[0], QID_MGMT);
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if (req_atim)
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rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[1], QID_MGMT);
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return 0;
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}
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void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
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{
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kfree(rt2x00dev->rx);
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rt2x00dev->rx = NULL;
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rt2x00dev->tx = NULL;
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rt2x00dev->bcn = NULL;
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}
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