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701016c0cb
This patch add pinctrl support to ST SoCs. About hardware: ST Set-Top-Box parts have two blocks called PIO and PIO-mux which handle pin configurations. Each multi-function pin is controlled, driven and routed through the PIO multiplexing block. Each pin supports GPIO functionality (ALT0) and multiple alternate functions(ALT1 - ALTx) that directly connect the pin to different hardware blocks. When a pin is in GPIO mode, Output Enable (OE), Open Drain(OD), and Pull Up (PU) are driven by the related PIO block. Otherwise the PIO multiplexing block configures these parameters and retiming the signal. About driver: This pinctrl driver manages both PIO and PIO-mux block using pinctrl, pinconf, pinmux, gpio subsystems. All the pinctrl related config information can only come from device trees. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mark Brown <broonie@linaro.org> |
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| .. | ||
| allwinner,sunxi-pinctrl.txt | ||
| atmel,at91-pinctrl.txt | ||
| brcm,bcm2835-gpio.txt | ||
| fsl,imx6dl-pinctrl.txt | ||
| fsl,imx6q-pinctrl.txt | ||
| fsl,imx6sl-pinctrl.txt | ||
| fsl,imx35-pinctrl.txt | ||
| fsl,imx51-pinctrl.txt | ||
| fsl,imx53-pinctrl.txt | ||
| fsl,imx-pinctrl.txt | ||
| fsl,mxs-pinctrl.txt | ||
| lantiq,falcon-pinumx.txt | ||
| lantiq,xway-pinumx.txt | ||
| marvell,armada-370-pinctrl.txt | ||
| marvell,armada-xp-pinctrl.txt | ||
| marvell,dove-pinctrl.txt | ||
| marvell,kirkwood-pinctrl.txt | ||
| marvell,mvebu-pinctrl.txt | ||
| nvidia,tegra20-pinmux.txt | ||
| nvidia,tegra30-pinmux.txt | ||
| nvidia,tegra114-pinmux.txt | ||
| pinctrl_spear.txt | ||
| pinctrl-bindings.txt | ||
| pinctrl-single.txt | ||
| pinctrl-sirf.txt | ||
| pinctrl-st.txt | ||
| pinctrl-vt8500.txt | ||
| samsung-pinctrl.txt | ||
| ste,nomadik.txt | ||