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All backends are reimplementing a variation of the same CPU reference count handling. They are also responsible for driving the MCPM special low-level locking. This is needless duplication, involving algorithmic requirements that are not necessarily obvious to the uninitiated. And from past code review experience, those were all initially implemented badly. After 3 years, it is time to refactor as much common code to the core MCPM facility to make the backends as simple as possible. To avoid a flag day, the new scheme is introduced in parallel to the existing backend interface. When all backends are converted over, the compatibility interface could be removed. The new MCPM backend interface implements simpler methods addressing very platform specific tasks performed under lock protection while keeping the algorithmic complexity and race avoidance local to the core code. Signed-off-by: Nicolas Pitre <nico@linaro.org> Tested-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
359 lines
13 KiB
C
359 lines
13 KiB
C
/*
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* arch/arm/include/asm/mcpm.h
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*
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* Created by: Nicolas Pitre, April 2012
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* Copyright: (C) 2012-2013 Linaro Limited
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef MCPM_H
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#define MCPM_H
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/*
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* Maximum number of possible clusters / CPUs per cluster.
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*
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* This should be sufficient for quite a while, while keeping the
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* (assembly) code simpler. When this starts to grow then we'll have
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* to consider dynamic allocation.
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*/
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#define MAX_CPUS_PER_CLUSTER 4
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#ifdef CONFIG_MCPM_QUAD_CLUSTER
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#define MAX_NR_CLUSTERS 4
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#else
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#define MAX_NR_CLUSTERS 2
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#endif
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#ifndef __ASSEMBLY__
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#include <linux/types.h>
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#include <asm/cacheflush.h>
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/*
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* Platform specific code should use this symbol to set up secondary
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* entry location for processors to use when released from reset.
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*/
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extern void mcpm_entry_point(void);
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/*
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* This is used to indicate where the given CPU from given cluster should
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* branch once it is ready to re-enter the kernel using ptr, or NULL if it
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* should be gated. A gated CPU is held in a WFE loop until its vector
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* becomes non NULL.
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*/
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void mcpm_set_entry_vector(unsigned cpu, unsigned cluster, void *ptr);
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/*
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* This sets an early poke i.e a value to be poked into some address
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* from very early assembly code before the CPU is ungated. The
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* address must be physical, and if 0 then nothing will happen.
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*/
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void mcpm_set_early_poke(unsigned cpu, unsigned cluster,
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unsigned long poke_phys_addr, unsigned long poke_val);
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/*
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* CPU/cluster power operations API for higher subsystems to use.
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*/
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/**
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* mcpm_is_available - returns whether MCPM is initialized and available
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*
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* This returns true or false accordingly.
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*/
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bool mcpm_is_available(void);
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/**
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* mcpm_cpu_power_up - make given CPU in given cluster runable
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*
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* @cpu: CPU number within given cluster
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* @cluster: cluster number for the CPU
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*
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* The identified CPU is brought out of reset. If the cluster was powered
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* down then it is brought up as well, taking care not to let the other CPUs
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* in the cluster run, and ensuring appropriate cluster setup.
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*
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* Caller must ensure the appropriate entry vector is initialized with
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* mcpm_set_entry_vector() prior to calling this.
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*
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* This must be called in a sleepable context. However, the implementation
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* is strongly encouraged to return early and let the operation happen
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* asynchronously, especially when significant delays are expected.
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*
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* If the operation cannot be performed then an error code is returned.
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*/
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int mcpm_cpu_power_up(unsigned int cpu, unsigned int cluster);
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/**
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* mcpm_cpu_power_down - power the calling CPU down
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*
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* The calling CPU is powered down.
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*
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* If this CPU is found to be the "last man standing" in the cluster
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* then the cluster is prepared for power-down too.
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*
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* This must be called with interrupts disabled.
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*
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* On success this does not return. Re-entry in the kernel is expected
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* via mcpm_entry_point.
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*
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* This will return if mcpm_platform_register() has not been called
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* previously in which case the caller should take appropriate action.
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*
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* On success, the CPU is not guaranteed to be truly halted until
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* mcpm_wait_for_cpu_powerdown() subsequently returns non-zero for the
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* specified cpu. Until then, other CPUs should make sure they do not
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* trash memory the target CPU might be executing/accessing.
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*/
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void mcpm_cpu_power_down(void);
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/**
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* mcpm_wait_for_cpu_powerdown - wait for a specified CPU to halt, and
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* make sure it is powered off
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*
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* @cpu: CPU number within given cluster
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* @cluster: cluster number for the CPU
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*
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* Call this function to ensure that a pending powerdown has taken
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* effect and the CPU is safely parked before performing non-mcpm
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* operations that may affect the CPU (such as kexec trashing the
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* kernel text).
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*
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* It is *not* necessary to call this function if you only need to
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* serialise a pending powerdown with mcpm_cpu_power_up() or a wakeup
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* event.
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*
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* Do not call this function unless the specified CPU has already
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* called mcpm_cpu_power_down() or has committed to doing so.
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*
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* @return:
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* - zero if the CPU is in a safely parked state
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* - nonzero otherwise (e.g., timeout)
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*/
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int mcpm_wait_for_cpu_powerdown(unsigned int cpu, unsigned int cluster);
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/**
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* mcpm_cpu_suspend - bring the calling CPU in a suspended state
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*
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* @expected_residency: duration in microseconds the CPU is expected
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* to remain suspended, or 0 if unknown/infinity.
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*
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* The calling CPU is suspended. The expected residency argument is used
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* as a hint by the platform specific backend to implement the appropriate
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* sleep state level according to the knowledge it has on wake-up latency
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* for the given hardware.
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*
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* If this CPU is found to be the "last man standing" in the cluster
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* then the cluster may be prepared for power-down too, if the expected
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* residency makes it worthwhile.
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*
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* This must be called with interrupts disabled.
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*
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* On success this does not return. Re-entry in the kernel is expected
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* via mcpm_entry_point.
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*
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* This will return if mcpm_platform_register() has not been called
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* previously in which case the caller should take appropriate action.
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*/
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void mcpm_cpu_suspend(u64 expected_residency);
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/**
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* mcpm_cpu_powered_up - housekeeping workafter a CPU has been powered up
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*
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* This lets the platform specific backend code perform needed housekeeping
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* work. This must be called by the newly activated CPU as soon as it is
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* fully operational in kernel space, before it enables interrupts.
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*
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* If the operation cannot be performed then an error code is returned.
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*/
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int mcpm_cpu_powered_up(void);
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/*
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* Platform specific callbacks used in the implementation of the above API.
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*
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* cpu_powerup:
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* Make given CPU runable. Called with MCPM lock held and IRQs disabled.
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* The given cluster is assumed to be set up (cluster_powerup would have
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* been called beforehand). Must return 0 for success or negative error code.
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*
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* cluster_powerup:
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* Set up power for given cluster. Called with MCPM lock held and IRQs
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* disabled. Called before first cpu_powerup when cluster is down. Must
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* return 0 for success or negative error code.
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*
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* cpu_suspend_prepare:
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* Special suspend configuration. Called on target CPU with MCPM lock held
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* and IRQs disabled. This callback is optional. If provided, it is called
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* before cpu_powerdown_prepare.
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*
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* cpu_powerdown_prepare:
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* Configure given CPU for power down. Called on target CPU with MCPM lock
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* held and IRQs disabled. Power down must be effective only at the next WFI instruction.
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*
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* cluster_powerdown_prepare:
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* Configure given cluster for power down. Called on one CPU from target
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* cluster with MCPM lock held and IRQs disabled. A cpu_powerdown_prepare
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* for each CPU in the cluster has happened when this occurs.
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*
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* cpu_cache_disable:
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* Clean and disable CPU level cache for the calling CPU. Called on with IRQs
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* disabled only. The CPU is no longer cache coherent with the rest of the
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* system when this returns.
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*
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* cluster_cache_disable:
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* Clean and disable the cluster wide cache as well as the CPU level cache
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* for the calling CPU. No call to cpu_cache_disable will happen for this
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* CPU. Called with IRQs disabled and only when all the other CPUs are done
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* with their own cpu_cache_disable. The cluster is no longer cache coherent
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* with the rest of the system when this returns.
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*
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* cpu_is_up:
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* Called on given CPU after it has been powered up or resumed. The MCPM lock
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* is held and IRQs disabled. This callback is optional.
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*
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* cluster_is_up:
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* Called by the first CPU to be powered up or resumed in given cluster.
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* The MCPM lock is held and IRQs disabled. This callback is optional. If
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* provided, it is called before cpu_is_up for that CPU.
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*
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* wait_for_powerdown:
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* Wait until given CPU is powered down. This is called in sleeping context.
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* Some reasonable timeout must be considered. Must return 0 for success or
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* negative error code.
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*/
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struct mcpm_platform_ops {
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int (*cpu_powerup)(unsigned int cpu, unsigned int cluster);
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int (*cluster_powerup)(unsigned int cluster);
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void (*cpu_suspend_prepare)(unsigned int cpu, unsigned int cluster);
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void (*cpu_powerdown_prepare)(unsigned int cpu, unsigned int cluster);
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void (*cluster_powerdown_prepare)(unsigned int cluster);
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void (*cpu_cache_disable)(void);
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void (*cluster_cache_disable)(void);
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void (*cpu_is_up)(unsigned int cpu, unsigned int cluster);
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void (*cluster_is_up)(unsigned int cluster);
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int (*wait_for_powerdown)(unsigned int cpu, unsigned int cluster);
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/* deprecated callbacks */
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int (*power_up)(unsigned int cpu, unsigned int cluster);
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void (*power_down)(void);
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void (*suspend)(u64);
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void (*powered_up)(void);
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};
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/**
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* mcpm_platform_register - register platform specific power methods
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*
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* @ops: mcpm_platform_ops structure to register
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*
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* An error is returned if the registration has been done previously.
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*/
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int __init mcpm_platform_register(const struct mcpm_platform_ops *ops);
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/* Synchronisation structures for coordinating safe cluster setup/teardown: */
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/*
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* When modifying this structure, make sure you update the MCPM_SYNC_ defines
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* to match.
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*/
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struct mcpm_sync_struct {
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/* individual CPU states */
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struct {
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s8 cpu __aligned(__CACHE_WRITEBACK_GRANULE);
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} cpus[MAX_CPUS_PER_CLUSTER];
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/* cluster state */
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s8 cluster __aligned(__CACHE_WRITEBACK_GRANULE);
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/* inbound-side state */
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s8 inbound __aligned(__CACHE_WRITEBACK_GRANULE);
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};
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struct sync_struct {
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struct mcpm_sync_struct clusters[MAX_NR_CLUSTERS];
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};
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void __mcpm_cpu_going_down(unsigned int cpu, unsigned int cluster);
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void __mcpm_cpu_down(unsigned int cpu, unsigned int cluster);
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void __mcpm_outbound_leave_critical(unsigned int cluster, int state);
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bool __mcpm_outbound_enter_critical(unsigned int this_cpu, unsigned int cluster);
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int __mcpm_cluster_state(unsigned int cluster);
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/**
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* mcpm_sync_init - Initialize the cluster synchronization support
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*
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* @power_up_setup: platform specific function invoked during very
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* early CPU/cluster bringup stage.
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*
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* This prepares memory used by vlocks and the MCPM state machine used
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* across CPUs that may have their caches active or inactive. Must be
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* called only after a successful call to mcpm_platform_register().
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*
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* The power_up_setup argument is a pointer to assembly code called when
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* the MMU and caches are still disabled during boot and no stack space is
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* available. The affinity level passed to that code corresponds to the
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* resource that needs to be initialized (e.g. 1 for cluster level, 0 for
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* CPU level). Proper exclusion mechanisms are already activated at that
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* point.
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*/
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int __init mcpm_sync_init(
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void (*power_up_setup)(unsigned int affinity_level));
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/**
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* mcpm_loopback - make a run through the MCPM low-level code
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*
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* @cache_disable: pointer to function performing cache disabling
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*
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* This exercises the MCPM machinery by soft resetting the CPU and branching
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* to the MCPM low-level entry code before returning to the caller.
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* The @cache_disable function must do the necessary cache disabling to
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* let the regular kernel init code turn it back on as if the CPU was
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* hotplugged in. The MCPM state machine is set as if the cluster was
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* initialized meaning the power_up_setup callback passed to mcpm_sync_init()
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* will be invoked for all affinity levels. This may be useful to initialize
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* some resources such as enabling the CCI that requires the cache to be off, or simply for testing purposes.
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*/
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int __init mcpm_loopback(void (*cache_disable)(void));
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void __init mcpm_smp_set_ops(void);
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#else
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/*
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* asm-offsets.h causes trouble when included in .c files, and cacheflush.h
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* cannot be included in asm files. Let's work around the conflict like this.
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*/
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#include <asm/asm-offsets.h>
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#define __CACHE_WRITEBACK_GRANULE CACHE_WRITEBACK_GRANULE
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#endif /* ! __ASSEMBLY__ */
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/* Definitions for mcpm_sync_struct */
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#define CPU_DOWN 0x11
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#define CPU_COMING_UP 0x12
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#define CPU_UP 0x13
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#define CPU_GOING_DOWN 0x14
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#define CLUSTER_DOWN 0x21
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#define CLUSTER_UP 0x22
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#define CLUSTER_GOING_DOWN 0x23
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#define INBOUND_NOT_COMING_UP 0x31
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#define INBOUND_COMING_UP 0x32
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/*
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* Offsets for the mcpm_sync_struct members, for use in asm.
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* We don't want to make them global to the kernel via asm-offsets.c.
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*/
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#define MCPM_SYNC_CLUSTER_CPUS 0
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#define MCPM_SYNC_CPU_SIZE __CACHE_WRITEBACK_GRANULE
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#define MCPM_SYNC_CLUSTER_CLUSTER \
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(MCPM_SYNC_CLUSTER_CPUS + MCPM_SYNC_CPU_SIZE * MAX_CPUS_PER_CLUSTER)
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#define MCPM_SYNC_CLUSTER_INBOUND \
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(MCPM_SYNC_CLUSTER_CLUSTER + __CACHE_WRITEBACK_GRANULE)
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#define MCPM_SYNC_CLUSTER_SIZE \
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(MCPM_SYNC_CLUSTER_INBOUND + __CACHE_WRITEBACK_GRANULE)
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#endif
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