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This patch adds definitions to enable support for s5p-fimc driver on ORIGEN board. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> [kgene.kim@samsung.com: re-ordering changes] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
130 lines
3.1 KiB
C
130 lines
3.1 KiB
C
/* linux/arch/arm/mach-exynos4/mach-origen.c
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*
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* Copyright (c) 2011 Insignal Co., Ltd.
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* http://www.insignal.co.kr/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/serial_core.h>
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#include <linux/gpio.h>
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#include <linux/mmc/host.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/input.h>
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#include <asm/mach/arch.h>
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#include <asm/mach-types.h>
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#include <plat/regs-serial.h>
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#include <plat/exynos4.h>
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#include <plat/cpu.h>
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#include <plat/devs.h>
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#include <plat/sdhci.h>
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#include <plat/iic.h>
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#include <plat/ehci.h>
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#include <plat/clock.h>
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#include <mach/map.h>
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/* Following are default values for UCON, ULCON and UFCON UART registers */
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#define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
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S3C2410_UCON_RXILEVEL | \
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S3C2410_UCON_TXIRQMODE | \
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S3C2410_UCON_RXIRQMODE | \
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S3C2410_UCON_RXFIFO_TOI | \
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S3C2443_UCON_RXERR_IRQEN)
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#define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8
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#define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
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S5PV210_UFCON_TXTRIG4 | \
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S5PV210_UFCON_RXTRIG4)
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static struct s3c2410_uartcfg origen_uartcfgs[] __initdata = {
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[0] = {
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.hwport = 0,
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.flags = 0,
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.ucon = ORIGEN_UCON_DEFAULT,
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.ulcon = ORIGEN_ULCON_DEFAULT,
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.ufcon = ORIGEN_UFCON_DEFAULT,
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},
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[1] = {
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.hwport = 1,
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.flags = 0,
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.ucon = ORIGEN_UCON_DEFAULT,
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.ulcon = ORIGEN_ULCON_DEFAULT,
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.ufcon = ORIGEN_UFCON_DEFAULT,
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},
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[2] = {
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.hwport = 2,
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.flags = 0,
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.ucon = ORIGEN_UCON_DEFAULT,
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.ulcon = ORIGEN_ULCON_DEFAULT,
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.ufcon = ORIGEN_UFCON_DEFAULT,
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},
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[3] = {
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.hwport = 3,
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.flags = 0,
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.ucon = ORIGEN_UCON_DEFAULT,
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.ulcon = ORIGEN_ULCON_DEFAULT,
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.ufcon = ORIGEN_UFCON_DEFAULT,
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},
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};
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static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = {
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.cd_type = S3C_SDHCI_CD_GPIO,
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.ext_cd_gpio = EXYNOS4_GPK2(2),
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.ext_cd_gpio_invert = 1,
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.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
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};
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/* USB EHCI */
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static struct s5p_ehci_platdata origen_ehci_pdata;
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static void __init origen_ehci_init(void)
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{
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struct s5p_ehci_platdata *pdata = &origen_ehci_pdata;
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s5p_ehci_set_platdata(pdata);
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}
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static struct platform_device *origen_devices[] __initdata = {
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&s3c_device_hsmmc2,
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&s3c_device_rtc,
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&s3c_device_wdt,
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&s5p_device_ehci,
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&s5p_device_fimc0,
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&s5p_device_fimc1,
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&s5p_device_fimc2,
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&s5p_device_fimc3,
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};
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static void __init origen_map_io(void)
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{
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s5p_init_io(NULL, 0, S5P_VA_CHIPID);
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s3c24xx_init_clocks(24000000);
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s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs));
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}
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static void __init origen_machine_init(void)
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{
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s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata);
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origen_ehci_init();
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clk_xusbxti.rate = 24000000;
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platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices));
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}
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MACHINE_START(ORIGEN, "ORIGEN")
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/* Maintainer: JeongHyeon Kim <jhkim@insignal.co.kr> */
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.boot_params = S5P_PA_SDRAM + 0x100,
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.init_irq = exynos4_init_irq,
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.map_io = origen_map_io,
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.init_machine = origen_machine_init,
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.timer = &exynos4_timer,
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MACHINE_END
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