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4f04f68e15
physmap_of sort of depends on the gemini and versatile modules (when
they're enabled), but this isn't expressed in Kconfig. Let's just merge
the modules all together, when enabled. Then we can avoid exporting a
few symbols, and the versatile and gemini code can now be modular again
(the below commit accidentally made them built-in only).
Resolves errors like this:
ERROR: "of_flash_probe_versatile" [drivers/mtd/maps/physmap_of.ko] undefined!
ERROR: "of_flash_probe_gemini" [drivers/mtd/maps/physmap_of.ko] undefined!
Fixes: 56ff337ea4 ("mtd: physmap_of: add a hook for Gemini flash probing")
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
118 lines
3.2 KiB
C
118 lines
3.2 KiB
C
/*
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* Cortina Systems Gemini OF physmap add-on
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* Copyright (C) 2017 Linus Walleij <linus.walleij@linaro.org>
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*
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* This SoC has an elaborate flash control register, so we need to
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* detect and set it up when booting on this platform.
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*/
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#include <linux/export.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/mtd/map.h>
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#include <linux/mfd/syscon.h>
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#include <linux/regmap.h>
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#include <linux/bitops.h>
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#include "physmap_of_gemini.h"
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/*
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* The Flash-relevant parts of the global status register
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* These would also be relevant for a NAND driver.
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*/
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#define GLOBAL_STATUS 0x04
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#define FLASH_TYPE_MASK (0x3 << 24)
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#define FLASH_TYPE_NAND_2K (0x3 << 24)
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#define FLASH_TYPE_NAND_512 (0x2 << 24)
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#define FLASH_TYPE_PARALLEL (0x1 << 24)
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#define FLASH_TYPE_SERIAL (0x0 << 24)
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/* if parallel */
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#define FLASH_WIDTH_16BIT (1 << 23) /* else 8 bit */
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/* if serial */
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#define FLASH_ATMEL (1 << 23) /* else STM */
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#define FLASH_SIZE_MASK (0x3 << 21)
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#define NAND_256M (0x3 << 21) /* and more */
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#define NAND_128M (0x2 << 21)
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#define NAND_64M (0x1 << 21)
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#define NAND_32M (0x0 << 21)
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#define ATMEL_16M (0x3 << 21) /* and more */
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#define ATMEL_8M (0x2 << 21)
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#define ATMEL_4M_2M (0x1 << 21)
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#define ATMEL_1M (0x0 << 21) /* and less */
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#define STM_32M (1 << 22) /* and more */
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#define STM_16M (0 << 22) /* and less */
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#define FLASH_PARALLEL_HIGH_PIN_CNT (1 << 20) /* else low pin cnt */
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/* Miscellaneous Control Register */
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#define GLOBAL_MISC_CTRL 0x30
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#define FLASH_PADS_MASK 0x07
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#define NAND_PADS_DISABLE BIT(2)
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#define PFLASH_PADS_DISABLE BIT(1)
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#define SFLASH_PADS_DISABLE BIT(0)
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static const struct of_device_id syscon_match[] = {
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{ .compatible = "cortina,gemini-syscon" },
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{ },
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};
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int of_flash_probe_gemini(struct platform_device *pdev,
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struct device_node *np,
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struct map_info *map)
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{
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static struct regmap *rmap;
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struct device *dev = &pdev->dev;
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u32 val;
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int ret;
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/* Multiplatform guard */
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if (!of_device_is_compatible(np, "cortina,gemini-flash"))
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return 0;
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rmap = syscon_regmap_lookup_by_phandle(np, "syscon");
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if (IS_ERR(rmap)) {
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dev_err(dev, "no syscon\n");
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return PTR_ERR(rmap);
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}
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ret = regmap_read(rmap, GLOBAL_STATUS, &val);
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if (ret) {
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dev_err(dev, "failed to read global status register\n");
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return -ENODEV;
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}
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dev_dbg(dev, "global status reg: %08x\n", val);
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/*
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* It would be contradictory if a physmap flash was NOT parallel.
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*/
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if ((val & FLASH_TYPE_MASK) != FLASH_TYPE_PARALLEL) {
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dev_err(dev, "flash is not parallel\n");
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return -ENODEV;
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}
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/*
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* Complain if DT data and hardware definition is different.
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*/
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if (val & FLASH_WIDTH_16BIT) {
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if (map->bankwidth != 2)
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dev_warn(dev, "flash hardware say flash is 16 bit wide but DT says it is %d bits wide\n",
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map->bankwidth * 8);
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} else {
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if (map->bankwidth != 1)
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dev_warn(dev, "flash hardware say flash is 8 bit wide but DT says it is %d bits wide\n",
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map->bankwidth * 8);
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}
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/* Activate parallel (NOR flash) mode */
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ret = regmap_update_bits(rmap, GLOBAL_MISC_CTRL,
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FLASH_PADS_MASK,
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SFLASH_PADS_DISABLE | NAND_PADS_DISABLE);
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if (ret) {
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dev_err(dev, "unable to set up physmap pads\n");
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return -ENODEV;
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}
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dev_info(&pdev->dev, "initialized Gemini-specific physmap control\n");
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return 0;
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}
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