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6e4cd27a35
Remove includes of me-hw.h and me-hw-regs.h headers from the mei generic code. The mei layer should not depend on hw specific headers Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
356 lines
8.8 KiB
C
356 lines
8.8 KiB
C
/*
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*
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* Intel Management Engine Interface (Intel MEI) Linux driver
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* Copyright (c) 2003-2012, Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/kernel.h>
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#include <linux/device.h>
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#include <linux/fs.h>
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#include <linux/errno.h>
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#include <linux/types.h>
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#include <linux/fcntl.h>
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#include <linux/aio.h>
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#include <linux/pci.h>
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#include <linux/poll.h>
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#include <linux/ioctl.h>
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#include <linux/cdev.h>
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#include <linux/sched.h>
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#include <linux/uuid.h>
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#include <linux/compat.h>
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#include <linux/jiffies.h>
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#include <linux/interrupt.h>
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#include <linux/miscdevice.h>
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#include <linux/mei.h>
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#include "mei_dev.h"
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#include "client.h"
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#include "hw-me-regs.h"
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#include "hw-me.h"
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/* mei_pci_tbl - PCI Device ID Table */
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static DEFINE_PCI_DEVICE_TABLE(mei_me_pci_tbl) = {
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82946GZ)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82G35)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82Q965)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82G965)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82GM965)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82GME965)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82Q35)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82G33)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82Q33)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82X38)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_3200)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_6)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_7)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_8)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_9)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_10)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_1)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_2)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_3)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_4)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_1)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_2)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_3)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_4)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_IBXPK_1)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_IBXPK_2)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_CPT_1)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PBG_1)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PPT_1)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PPT_2)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PPT_3)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT_H)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT_W)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT_LP)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT_HR)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_WPT_LP)},
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/* required last entry */
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{0, }
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};
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MODULE_DEVICE_TABLE(pci, mei_me_pci_tbl);
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/**
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* mei_quirk_probe - probe for devices that doesn't valid ME interface
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*
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* @pdev: PCI device structure
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* @ent: entry into pci_device_table
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*
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* returns true if ME Interface is valid, false otherwise
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*/
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static bool mei_me_quirk_probe(struct pci_dev *pdev,
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const struct pci_device_id *ent)
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{
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u32 reg;
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if (ent->device == MEI_DEV_ID_PBG_1) {
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pci_read_config_dword(pdev, 0x48, ®);
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/* make sure that bit 9 is up and bit 10 is down */
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if ((reg & 0x600) == 0x200) {
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dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n");
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return false;
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}
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}
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return true;
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}
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/**
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* mei_probe - Device Initialization Routine
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*
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* @pdev: PCI device structure
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* @ent: entry in kcs_pci_tbl
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*
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* returns 0 on success, <0 on failure.
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*/
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static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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struct mei_device *dev;
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struct mei_me_hw *hw;
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int err;
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if (!mei_me_quirk_probe(pdev, ent)) {
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err = -ENODEV;
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goto end;
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}
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/* enable pci dev */
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err = pci_enable_device(pdev);
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if (err) {
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dev_err(&pdev->dev, "failed to enable pci device.\n");
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goto end;
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}
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/* set PCI host mastering */
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pci_set_master(pdev);
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/* pci request regions for mei driver */
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err = pci_request_regions(pdev, KBUILD_MODNAME);
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if (err) {
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dev_err(&pdev->dev, "failed to get pci regions.\n");
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goto disable_device;
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}
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if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) ||
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dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
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err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
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if (err)
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err = dma_set_coherent_mask(&pdev->dev,
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DMA_BIT_MASK(32));
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}
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if (err) {
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dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
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goto release_regions;
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}
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/* allocates and initializes the mei dev structure */
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dev = mei_me_dev_init(pdev);
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if (!dev) {
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err = -ENOMEM;
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goto release_regions;
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}
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hw = to_me_hw(dev);
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/* mapping IO device memory */
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hw->mem_addr = pci_iomap(pdev, 0, 0);
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if (!hw->mem_addr) {
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dev_err(&pdev->dev, "mapping I/O device memory failure.\n");
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err = -ENOMEM;
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goto free_device;
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}
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pci_enable_msi(pdev);
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/* request and enable interrupt */
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if (pci_dev_msi_enabled(pdev))
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err = request_threaded_irq(pdev->irq,
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NULL,
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mei_me_irq_thread_handler,
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IRQF_ONESHOT, KBUILD_MODNAME, dev);
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else
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err = request_threaded_irq(pdev->irq,
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mei_me_irq_quick_handler,
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mei_me_irq_thread_handler,
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IRQF_SHARED, KBUILD_MODNAME, dev);
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if (err) {
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dev_err(&pdev->dev, "request_threaded_irq failure. irq = %d\n",
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pdev->irq);
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goto disable_msi;
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}
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if (mei_start(dev)) {
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dev_err(&pdev->dev, "init hw failure.\n");
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err = -ENODEV;
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goto release_irq;
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}
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err = mei_register(dev);
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if (err)
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goto release_irq;
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pci_set_drvdata(pdev, dev);
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schedule_delayed_work(&dev->timer_work, HZ);
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dev_dbg(&pdev->dev, "initialization successful.\n");
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return 0;
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release_irq:
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mei_cancel_work(dev);
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mei_disable_interrupts(dev);
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free_irq(pdev->irq, dev);
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disable_msi:
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pci_disable_msi(pdev);
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pci_iounmap(pdev, hw->mem_addr);
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free_device:
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kfree(dev);
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release_regions:
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pci_release_regions(pdev);
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disable_device:
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pci_disable_device(pdev);
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end:
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dev_err(&pdev->dev, "initialization failed.\n");
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return err;
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}
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/**
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* mei_remove - Device Removal Routine
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*
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* @pdev: PCI device structure
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*
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* mei_remove is called by the PCI subsystem to alert the driver
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* that it should release a PCI device.
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*/
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static void mei_me_remove(struct pci_dev *pdev)
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{
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struct mei_device *dev;
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struct mei_me_hw *hw;
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dev = pci_get_drvdata(pdev);
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if (!dev)
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return;
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hw = to_me_hw(dev);
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dev_dbg(&pdev->dev, "stop\n");
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mei_stop(dev);
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/* disable interrupts */
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mei_disable_interrupts(dev);
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free_irq(pdev->irq, dev);
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pci_disable_msi(pdev);
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if (hw->mem_addr)
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pci_iounmap(pdev, hw->mem_addr);
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mei_deregister(dev);
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kfree(dev);
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pci_release_regions(pdev);
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pci_disable_device(pdev);
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}
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#ifdef CONFIG_PM_SLEEP
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static int mei_me_pci_suspend(struct device *device)
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{
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struct pci_dev *pdev = to_pci_dev(device);
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struct mei_device *dev = pci_get_drvdata(pdev);
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if (!dev)
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return -ENODEV;
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dev_dbg(&pdev->dev, "suspend\n");
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mei_stop(dev);
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mei_disable_interrupts(dev);
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free_irq(pdev->irq, dev);
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pci_disable_msi(pdev);
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return 0;
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}
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static int mei_me_pci_resume(struct device *device)
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{
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struct pci_dev *pdev = to_pci_dev(device);
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struct mei_device *dev;
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int err;
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dev = pci_get_drvdata(pdev);
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if (!dev)
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return -ENODEV;
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pci_enable_msi(pdev);
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/* request and enable interrupt */
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if (pci_dev_msi_enabled(pdev))
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err = request_threaded_irq(pdev->irq,
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NULL,
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mei_me_irq_thread_handler,
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IRQF_ONESHOT, KBUILD_MODNAME, dev);
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else
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err = request_threaded_irq(pdev->irq,
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mei_me_irq_quick_handler,
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mei_me_irq_thread_handler,
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IRQF_SHARED, KBUILD_MODNAME, dev);
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if (err) {
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dev_err(&pdev->dev, "request_threaded_irq failed: irq = %d.\n",
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pdev->irq);
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return err;
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}
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err = mei_restart(dev);
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if (err)
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return err;
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/* Start timer if stopped in suspend */
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schedule_delayed_work(&dev->timer_work, HZ);
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return 0;
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}
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static SIMPLE_DEV_PM_OPS(mei_me_pm_ops, mei_me_pci_suspend, mei_me_pci_resume);
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#define MEI_ME_PM_OPS (&mei_me_pm_ops)
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#else
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#define MEI_ME_PM_OPS NULL
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#endif /* CONFIG_PM_SLEEP */
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/*
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* PCI driver structure
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*/
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static struct pci_driver mei_me_driver = {
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.name = KBUILD_MODNAME,
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.id_table = mei_me_pci_tbl,
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.probe = mei_me_probe,
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.remove = mei_me_remove,
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.shutdown = mei_me_remove,
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.driver.pm = MEI_ME_PM_OPS,
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};
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module_pci_driver(mei_me_driver);
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MODULE_AUTHOR("Intel Corporation");
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MODULE_DESCRIPTION("Intel(R) Management Engine Interface");
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MODULE_LICENSE("GPL v2");
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