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Following the introduction of the generic ECC engine infrastructure, it
was necessary to reorganize the code and move the ECC configuration in
the ->attach_chip() hook. Failing to do that properly lead to a first
series of fixes supposed to stabilize the situation. Unfortunately, this
only fixed the use of software ECC engines, preventing any other kind of
engine to be used, including on-die ones.
It is now time to (finally) fix the situation by ensuring that we still
provide a default (eg. software ECC) but will still support different
ECC engines such as on-die ECC engines if properly described in the
device tree.
There are no changes needed on the core side in order to do this, but we
just need to leverage the logic there which allows:
1- a subsystem default (set to Host engines in the raw NAND world)
2- a driver specific default (here set to software ECC engines)
3- any type of engine requested by the user (ie. described in the DT)
As the raw NAND subsystem has not yet been fully converted to the ECC
engine infrastructure, in order to provide a default ECC engine for this
driver we need to set chip->ecc.engine_type *before* calling
nand_scan(). During the initialization step, the core will consider this
entry as the default engine for this driver. This value may of course
be overloaded by the user if the usual DT properties are provided.
Fixes: 612e048e6a
("mtd: rawnand: plat_nand: Move the ECC initialization to ->attach_chip()")
Cc: stable@vger.kernel.org
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210928222258.199726-8-miquel.raynal@bootlin.com
162 lines
3.9 KiB
C
162 lines
3.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Generic NAND driver
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*
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* Author: Vitaly Wool <vitalywool@gmail.com>
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*/
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/platnand.h>
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struct plat_nand_data {
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struct nand_controller controller;
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struct nand_chip chip;
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void __iomem *io_base;
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};
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static int plat_nand_attach_chip(struct nand_chip *chip)
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{
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if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_SOFT &&
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chip->ecc.algo == NAND_ECC_ALGO_UNKNOWN)
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chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
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return 0;
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}
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static const struct nand_controller_ops plat_nand_ops = {
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.attach_chip = plat_nand_attach_chip,
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};
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/*
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* Probe for the NAND device.
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*/
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static int plat_nand_probe(struct platform_device *pdev)
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{
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struct platform_nand_data *pdata = dev_get_platdata(&pdev->dev);
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struct plat_nand_data *data;
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struct mtd_info *mtd;
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const char **part_types;
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int err = 0;
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if (!pdata) {
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dev_err(&pdev->dev, "platform_nand_data is missing\n");
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return -EINVAL;
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}
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if (pdata->chip.nr_chips < 1) {
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dev_err(&pdev->dev, "invalid number of chips specified\n");
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return -EINVAL;
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}
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/* Allocate memory for the device structure (and zero it) */
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data = devm_kzalloc(&pdev->dev, sizeof(struct plat_nand_data),
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GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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data->controller.ops = &plat_nand_ops;
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nand_controller_init(&data->controller);
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data->chip.controller = &data->controller;
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data->io_base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(data->io_base))
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return PTR_ERR(data->io_base);
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nand_set_flash_node(&data->chip, pdev->dev.of_node);
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mtd = nand_to_mtd(&data->chip);
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mtd->dev.parent = &pdev->dev;
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data->chip.legacy.IO_ADDR_R = data->io_base;
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data->chip.legacy.IO_ADDR_W = data->io_base;
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data->chip.legacy.cmd_ctrl = pdata->ctrl.cmd_ctrl;
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data->chip.legacy.dev_ready = pdata->ctrl.dev_ready;
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data->chip.legacy.select_chip = pdata->ctrl.select_chip;
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data->chip.legacy.write_buf = pdata->ctrl.write_buf;
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data->chip.legacy.read_buf = pdata->ctrl.read_buf;
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data->chip.legacy.chip_delay = pdata->chip.chip_delay;
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data->chip.options |= pdata->chip.options;
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data->chip.bbt_options |= pdata->chip.bbt_options;
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platform_set_drvdata(pdev, data);
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/* Handle any platform specific setup */
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if (pdata->ctrl.probe) {
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err = pdata->ctrl.probe(pdev);
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if (err)
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goto out;
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}
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/*
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* This driver assumes that the default ECC engine should be TYPE_SOFT.
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* Set ->engine_type before registering the NAND devices in order to
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* provide a driver specific default value.
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*/
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data->chip.ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
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/* Scan to find existence of the device */
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err = nand_scan(&data->chip, pdata->chip.nr_chips);
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if (err)
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goto out;
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part_types = pdata->chip.part_probe_types;
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err = mtd_device_parse_register(mtd, part_types, NULL,
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pdata->chip.partitions,
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pdata->chip.nr_partitions);
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if (!err)
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return err;
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nand_cleanup(&data->chip);
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out:
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if (pdata->ctrl.remove)
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pdata->ctrl.remove(pdev);
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return err;
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}
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/*
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* Remove a NAND device.
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*/
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static int plat_nand_remove(struct platform_device *pdev)
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{
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struct plat_nand_data *data = platform_get_drvdata(pdev);
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struct platform_nand_data *pdata = dev_get_platdata(&pdev->dev);
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struct nand_chip *chip = &data->chip;
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int ret;
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ret = mtd_device_unregister(nand_to_mtd(chip));
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WARN_ON(ret);
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nand_cleanup(chip);
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if (pdata->ctrl.remove)
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pdata->ctrl.remove(pdev);
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return 0;
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}
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static const struct of_device_id plat_nand_match[] = {
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{ .compatible = "gen_nand" },
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{},
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};
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MODULE_DEVICE_TABLE(of, plat_nand_match);
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static struct platform_driver plat_nand_driver = {
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.probe = plat_nand_probe,
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.remove = plat_nand_remove,
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.driver = {
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.name = "gen_nand",
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.of_match_table = plat_nand_match,
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},
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};
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module_platform_driver(plat_nand_driver);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Vitaly Wool");
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MODULE_DESCRIPTION("Simple generic NAND driver");
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MODULE_ALIAS("platform:gen_nand");
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