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This adds the devicetree bindings documentation for the SPI controller present in the Marvell Armada 3700 SoCs. Signed-off-by: Romain Perier <romain.perier@free-electrons.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
26 lines
784 B
Plaintext
26 lines
784 B
Plaintext
* Marvell Armada 3700 SPI Controller
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Required Properties:
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- compatible: should be "marvell,armada-3700-spi"
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- reg: physical base address of the controller and length of memory mapped
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region.
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- interrupts: The interrupt number. The interrupt specifier format depends on
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the interrupt controller and of its driver.
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- clocks: Must contain the clock source, usually from the North Bridge clocks.
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- num-cs: The number of chip selects that is supported by this SPI Controller
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- #address-cells: should be 1.
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- #size-cells: should be 0.
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Example:
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spi0: spi@10600 {
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compatible = "marvell,armada-3700-spi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x10600 0x5d>;
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clocks = <&nb_perih_clk 7>;
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interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
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num-cs = <4>;
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};
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