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This relaxes the kernel Image placement requirements, so that it may be placed at any 2 MB aligned offset in physical memory. This is accomplished by ignoring PHYS_OFFSET when installing memblocks, and accounting for the apparent virtual offset of the kernel Image. As a result, virtual address references below PAGE_OFFSET are correctly mapped onto physical references into the kernel Image regardless of where it sits in memory. Special care needs to be taken for dealing with memory limits passed via mem=, since the generic implementation clips memory top down, which may clip the kernel image itself if it is loaded high up in memory. To deal with this case, we simply add back the memory covering the kernel image, which may result in more memory to be retained than was passed as a mem= parameter. Since mem= should not be considered a production feature, a panic notifier handler is installed that dumps the memory limit at panic time if one was set. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
96 lines
3.3 KiB
C
96 lines
3.3 KiB
C
/*
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* Kernel page table mapping
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*
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* Copyright (C) 2015 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_KERNEL_PGTABLE_H
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#define __ASM_KERNEL_PGTABLE_H
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/*
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* The linear mapping and the start of memory are both 2M aligned (per
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* the arm64 booting.txt requirements). Hence we can use section mapping
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* with 4K (section size = 2M) but not with 16K (section size = 32M) or
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* 64K (section size = 512M).
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*/
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#ifdef CONFIG_ARM64_4K_PAGES
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#define ARM64_SWAPPER_USES_SECTION_MAPS 1
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#else
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#define ARM64_SWAPPER_USES_SECTION_MAPS 0
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#endif
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/*
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* The idmap and swapper page tables need some space reserved in the kernel
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* image. Both require pgd, pud (4 levels only) and pmd tables to (section)
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* map the kernel. With the 64K page configuration, swapper and idmap need to
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* map to pte level. The swapper also maps the FDT (see __create_page_tables
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* for more information). Note that the number of ID map translation levels
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* could be increased on the fly if system RAM is out of reach for the default
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* VA range, so pages required to map highest possible PA are reserved in all
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* cases.
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*/
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#if ARM64_SWAPPER_USES_SECTION_MAPS
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#define SWAPPER_PGTABLE_LEVELS (CONFIG_PGTABLE_LEVELS - 1)
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#define IDMAP_PGTABLE_LEVELS (ARM64_HW_PGTABLE_LEVELS(PHYS_MASK_SHIFT) - 1)
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#else
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#define SWAPPER_PGTABLE_LEVELS (CONFIG_PGTABLE_LEVELS)
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#define IDMAP_PGTABLE_LEVELS (ARM64_HW_PGTABLE_LEVELS(PHYS_MASK_SHIFT))
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#endif
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#define SWAPPER_DIR_SIZE (SWAPPER_PGTABLE_LEVELS * PAGE_SIZE)
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#define IDMAP_DIR_SIZE (IDMAP_PGTABLE_LEVELS * PAGE_SIZE)
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/* Initial memory map size */
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#if ARM64_SWAPPER_USES_SECTION_MAPS
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#define SWAPPER_BLOCK_SHIFT SECTION_SHIFT
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#define SWAPPER_BLOCK_SIZE SECTION_SIZE
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#define SWAPPER_TABLE_SHIFT PUD_SHIFT
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#else
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#define SWAPPER_BLOCK_SHIFT PAGE_SHIFT
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#define SWAPPER_BLOCK_SIZE PAGE_SIZE
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#define SWAPPER_TABLE_SHIFT PMD_SHIFT
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#endif
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/* The size of the initial kernel direct mapping */
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#define SWAPPER_INIT_MAP_SIZE (_AC(1, UL) << SWAPPER_TABLE_SHIFT)
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/*
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* Initial memory map attributes.
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*/
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#define SWAPPER_PTE_FLAGS (PTE_TYPE_PAGE | PTE_AF | PTE_SHARED)
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#define SWAPPER_PMD_FLAGS (PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S)
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#if ARM64_SWAPPER_USES_SECTION_MAPS
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#define SWAPPER_MM_MMUFLAGS (PMD_ATTRINDX(MT_NORMAL) | SWAPPER_PMD_FLAGS)
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#else
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#define SWAPPER_MM_MMUFLAGS (PTE_ATTRINDX(MT_NORMAL) | SWAPPER_PTE_FLAGS)
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#endif
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/*
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* To make optimal use of block mappings when laying out the linear
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* mapping, round down the base of physical memory to a size that can
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* be mapped efficiently, i.e., either PUD_SIZE (4k granule) or PMD_SIZE
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* (64k granule), or a multiple that can be mapped using contiguous bits
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* in the page tables: 32 * PMD_SIZE (16k granule)
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*/
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#ifdef CONFIG_ARM64_64K_PAGES
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#define ARM64_MEMSTART_ALIGN SZ_512M
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#else
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#define ARM64_MEMSTART_ALIGN SZ_1G
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#endif
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#endif /* __ASM_KERNEL_PGTABLE_H */
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