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During cleanup, use L1GPU_CONTEXT_ATTRIBUTE_FB_CLOSE to tear down the setup done by L1GPU_CONTEXT_ATTRIBUTE_FB_SETUP. This allows unloading and reloading of ps3fb while the sound driver keeps the GPU open. Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> Cc: linux-fbdev-devel@lists.sourceforge.net Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
87 lines
2.4 KiB
C
87 lines
2.4 KiB
C
/*
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* PS3 GPU declarations.
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*
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* Copyright 2009 Sony Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program.
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _ASM_POWERPC_PS3GPU_H
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#define _ASM_POWERPC_PS3GPU_H
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#include <linux/mutex.h>
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#include <asm/lv1call.h>
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#define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC 0x101
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#define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP 0x102
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#define L1GPU_CONTEXT_ATTRIBUTE_FB_SETUP 0x600
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#define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT 0x601
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#define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT_SYNC 0x602
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#define L1GPU_CONTEXT_ATTRIBUTE_FB_CLOSE 0x603
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#define L1GPU_FB_BLIT_WAIT_FOR_COMPLETION (1ULL << 32)
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#define L1GPU_DISPLAY_SYNC_HSYNC 1
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#define L1GPU_DISPLAY_SYNC_VSYNC 2
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/* mutex synchronizing GPU accesses and video mode changes */
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extern struct mutex ps3_gpu_mutex;
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static inline int lv1_gpu_display_sync(u64 context_handle, u64 head,
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u64 ddr_offset)
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{
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return lv1_gpu_context_attribute(context_handle,
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L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC,
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head, ddr_offset, 0, 0);
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}
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static inline int lv1_gpu_display_flip(u64 context_handle, u64 head,
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u64 ddr_offset)
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{
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return lv1_gpu_context_attribute(context_handle,
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L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP,
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head, ddr_offset, 0, 0);
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}
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static inline int lv1_gpu_fb_setup(u64 context_handle, u64 xdr_lpar,
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u64 xdr_size, u64 ioif_offset)
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{
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return lv1_gpu_context_attribute(context_handle,
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L1GPU_CONTEXT_ATTRIBUTE_FB_SETUP,
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xdr_lpar, xdr_size, ioif_offset, 0);
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}
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static inline int lv1_gpu_fb_blit(u64 context_handle, u64 ddr_offset,
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u64 ioif_offset, u64 sync_width, u64 pitch)
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{
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return lv1_gpu_context_attribute(context_handle,
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L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT,
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ddr_offset, ioif_offset, sync_width,
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pitch);
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}
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static inline int lv1_gpu_fb_close(u64 context_handle)
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{
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return lv1_gpu_context_attribute(context_handle,
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L1GPU_CONTEXT_ATTRIBUTE_FB_CLOSE, 0,
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0, 0, 0);
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}
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#endif /* _ASM_POWERPC_PS3GPU_H */
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