linux/Documentation/devicetree/bindings/arm/omap
Suman Anna e7309c2673 bus: omap_l3_noc: Fix master id address decoding for OMAP5
The L3 Error handling on OMAP5 for the most part is very similar
to that of OMAP4, and had leveraged common data structures and
register layout definitions so far. Upon closer inspection, there
are a few minor differences causing an incorrect decoding and
reporting of the master NIU upon an error:

  1. The L3_TARG_STDERRLOG_MSTADDR.STDERRLOG_MSTADDR occupies
     11 bits on OMAP5 as against 8 bits on OMAP4, with the master
     NIU connID encoded in the 6 MSBs of the STDERRLOG_MSTADDR
     field.
  2. The CLK3 FlagMux component has 1 input source on OMAP4 and 3
     input sources on OMAP5. The common DEBUGSS source is at a
     different input on each SoC.

Fix the above issues by using a OMAP5-specific compatible property
and using SoC-specific data where there are differences.

Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-05-04 10:21:01 -07:00
..
counter.txt ARM: dts: OMAP: Add counter-32k nodes 2012-10-29 16:56:33 +01:00
crossbar.txt DT: update ti,irq-crossbar binding 2015-03-15 00:55:30 +00:00
ctrl.txt ARM: dts: dra7: add minimal l4 bus layout with control module support 2015-03-31 21:26:59 +03:00
dmm.txt ARM: dts: omap4+: Add DMM bindings 2014-03-02 21:26:27 +01:00
dsp.txt arm/dts: OMAP3+: Add mpu, dsp and iva nodes 2011-10-04 22:29:40 +02:00
intc.txt ARM: OMAP2/3: intc: Add DT support for TI interrupt controller 2012-02-27 10:33:18 +01:00
iva.txt arm/dts: OMAP3+: Add mpu, dsp and iva nodes 2011-10-04 22:29:40 +02:00
l3-noc.txt bus: omap_l3_noc: Fix master id address decoding for OMAP5 2015-05-04 10:21:01 -07:00
l4.txt ARM: dts: dra7: add minimal l4 bus layout with control module support 2015-03-31 21:26:59 +03:00
mpu.txt ARM: OMAP4+: Remove static iotable mappings for SRAM 2014-09-18 09:47:35 -07:00
omap.txt ARM: dts: Add devicetree for NovaTech OrionLXm 2014-11-21 15:31:57 -08:00
prcm.txt ARM: dts: omap4: add minimal l4 bus layout with control module support 2015-03-31 21:26:56 +03:00
timer.txt ARM: dts: OMAP2+: Update DMTIMER compatibility property 2013-04-09 00:21:31 +02:00