mirror of
https://github.com/torvalds/linux.git
synced 2024-11-05 03:21:32 +00:00
ea584595fc
cycle: - Increase the default ARCH_NR_GPIO from 256 to 512. This was done to avoid having a custom <asm/gpio.h> header for the x86 architecture - GPIO is custom and complicated enough as it is already! We want to move to a radix to store the descriptors going forward, and finally get rid of this fixed array size altogether. - Endgame patching of the gpio_remove() semantics initiated by Abdoulaye Berthe. It is not accepted by the system that the removal of a GPIO chip fails during e.g. reboot or shutdown, and therefore the return value has now painfully been refactored away. For special cases like GPIO expanders on a hot-pluggable bus like USB, we may later add some gpiochip_try_remove() call, but for the cases we have now, return values are moot. - Some incremental refactoring of the gpiolib core and ACPI GPIO library for more descriptor usage. - Refactor the chained IRQ handler set-up method to handle also threaded, nested interrupts and set up the parent IRQ correctly. Switch STMPE and TC3589x drivers to use this registration method. - Add a .irq_not_threaded flag to the struct gpio_chip, so that also GPIO expanders that block but are still not using threaded IRQ handlers. - New drivers for the ARM64 X-Gene SoC GPIO controller. - The syscon GPIO driver has been improved to handle the "DSP GPIO" found on the TI Keystone 2 SoC:s. - ADNP driver switched to use gpiolib irqchip helpers. - Refactor the DWAPB driver to support being instantiated from and MFD cell (platform device). - Incremental feature improvement in the Zynq, MCP23S08, DWAPB, OMAP, Xilinx and Crystalcove drivers. - Various minor fixes. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJUNOr0AAoJEEEQszewGV1z9toP/2ISXRnsi3+jlqVmEGm/y6EA PPwJOiYnOhZR2/fTCHIF0PNbIi9pw7xKnzxttYCu4uCz7geHX+FfTwUZ2/KWMfqi ZJ9kEoOVVKzKjmL/m2a2tO4IRSBHqJ8dF3yvaNjS3AL7EDfG6F5STErQurdLEynK SeJZ2OwM/vRFCac6F7oDlqAUTu3xYGbVD8+zI0H0V/ReocosFlEwcbl2S8ctDWUd h98M+gY+A8rxkvVMnmQ/k7rUTme/glDQ3z5xVx+uHbS2/a5M1jSM/71cXE6YnSrR it0CK7CHomq2RzHsKf7oH7GD4kFkukMwFKeMoqz75JWz3352VZPTF53chCIqRSgO hrgGwZ7WF6pUUUhsn1ZdZsnBPA2Fou2uwslyLSAiE+OYEH2/NSVIOUcorjQcWqU/ 0Kix5yb8X1ZzRMhR+TVrTD5V0jguqp2buXq+0P2XlU6MoO2vy7iNf2eXvPg8sF8C anjTCKgmkzy7eyT2uzfDaNZAyfSBKb1TiKiR9zA0SRChJkCi1ErJEXDGeHiptvSA +D2k68Ils2LqsvdrnEd2XvVFMllh0iq7b+16o7D+Els0WRbnHpfYCaqfOuF5F4U0 SmeyI0ruawNDc5e9EBKXstt0/R9AMOetyTcTu29U2ZVo90zGaT1ofT8+R1jJ0kGa bPARJZrgecgv1E9Qnnnd =8InA -----END PGP SIGNATURE----- Merge tag 'gpio-v3.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO changes from Linus Walleij: "This is the bulk of GPIO changes for the v3.18 development cycle: - Increase the default ARCH_NR_GPIO from 256 to 512. This was done to avoid having a custom <asm/gpio.h> header for the x86 architecture - GPIO is custom and complicated enough as it is already! We want to move to a radix to store the descriptors going forward, and finally get rid of this fixed array size altogether. - Endgame patching of the gpio_remove() semantics initiated by Abdoulaye Berthe. It is not accepted by the system that the removal of a GPIO chip fails during eg reboot or shutdown, and therefore the return value has now painfully been refactored away. For special cases like GPIO expanders on a hot-pluggable bus like USB, we may later add some gpiochip_try_remove() call, but for the cases we have now, return values are moot. - Some incremental refactoring of the gpiolib core and ACPI GPIO library for more descriptor usage. - Refactor the chained IRQ handler set-up method to handle also threaded, nested interrupts and set up the parent IRQ correctly. Switch STMPE and TC3589x drivers to use this registration method. - Add a .irq_not_threaded flag to the struct gpio_chip, so that also GPIO expanders that block but are still not using threaded IRQ handlers. - New drivers for the ARM64 X-Gene SoC GPIO controller. - The syscon GPIO driver has been improved to handle the "DSP GPIO" found on the TI Keystone 2 SoC:s. - ADNP driver switched to use gpiolib irqchip helpers. - Refactor the DWAPB driver to support being instantiated from and MFD cell (platform device). - Incremental feature improvement in the Zynq, MCP23S08, DWAPB, OMAP, Xilinx and Crystalcove drivers. - Various minor fixes" * tag 'gpio-v3.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (52 commits) gpio: pch: Build context save/restore only for PM pinctrl: abx500: get rid of unused variable gpio: ks8695: fix 'else should follow close brace '}'' gpio: stmpe: add verbose debug code gpio: stmpe: fix up interrupt enable logic gpio: staticize xway_stp_init() gpio: handle also nested irqchips in the chained handler set-up gpio: set parent irq on chained handlers gpiolib: irqchip: use irq_find_mapping while removing irqchip gpio: crystalcove: support virtual GPIO pinctrl: bcm281xx: make Kconfig dependency more strict gpio: kona: enable only on BCM_MOBILE or for compile testing gpio, bcm-kona, LLVMLinux: Remove use of __initconst gpio: Fix ngpio in gpio-xilinx driver gpio: dwapb: fix pointer to integer cast gpio: xgene: Remove unneeded #ifdef CONFIG_OF guard gpio: xgene: Remove unneeded forward declation for struct xgene_gpio gpio: xgene: Fix missing spin_lock_init() gpio: ks8695: fix switch case indentation gpiolib: add irq_not_threaded flag to gpio_chip ...
229 lines
5.2 KiB
Plaintext
229 lines
5.2 KiB
Plaintext
#
|
|
# PINCTRL infrastructure and drivers
|
|
#
|
|
|
|
config PINCTRL
|
|
bool
|
|
|
|
if PINCTRL
|
|
|
|
menu "Pin controllers"
|
|
depends on PINCTRL
|
|
|
|
config PINMUX
|
|
bool "Support pin multiplexing controllers" if COMPILE_TEST
|
|
|
|
config PINCONF
|
|
bool "Support pin configuration controllers" if COMPILE_TEST
|
|
|
|
config GENERIC_PINCONF
|
|
bool
|
|
select PINCONF
|
|
|
|
config DEBUG_PINCTRL
|
|
bool "Debug PINCTRL calls"
|
|
depends on DEBUG_KERNEL
|
|
help
|
|
Say Y here to add some extra checks and diagnostics to PINCTRL calls.
|
|
|
|
config PINCTRL_ADI2
|
|
bool "ADI pin controller driver"
|
|
depends on BLACKFIN
|
|
select PINMUX
|
|
select IRQ_DOMAIN
|
|
help
|
|
This is the pin controller and gpio driver for ADI BF54x, BF60x and
|
|
future processors. This option is selected automatically when specific
|
|
machine and arch are selected to build.
|
|
|
|
config PINCTRL_AS3722
|
|
bool "Pinctrl and GPIO driver for ams AS3722 PMIC"
|
|
depends on MFD_AS3722 && GPIOLIB
|
|
select PINMUX
|
|
select GENERIC_PINCONF
|
|
help
|
|
AS3722 device supports the configuration of GPIO pins for different
|
|
functionality. This driver supports the pinmux, push-pull and
|
|
open drain configuration for the GPIO pins of AS3722 devices. It also
|
|
supports the GPIO functionality through gpiolib.
|
|
|
|
config PINCTRL_BF54x
|
|
def_bool y if BF54x
|
|
select PINCTRL_ADI2
|
|
|
|
config PINCTRL_BF60x
|
|
def_bool y if BF60x
|
|
select PINCTRL_ADI2
|
|
|
|
config PINCTRL_AT91
|
|
bool "AT91 pinctrl driver"
|
|
depends on OF
|
|
depends on ARCH_AT91
|
|
select PINMUX
|
|
select PINCONF
|
|
select GPIOLIB
|
|
select OF_GPIO
|
|
select GPIOLIB_IRQCHIP
|
|
help
|
|
Say Y here to enable the at91 pinctrl driver
|
|
|
|
config PINCTRL_BAYTRAIL
|
|
bool "Intel Baytrail GPIO pin control"
|
|
depends on GPIOLIB && ACPI && X86
|
|
select GPIOLIB_IRQCHIP
|
|
help
|
|
driver for memory mapped GPIO functionality on Intel Baytrail
|
|
platforms. Supports 3 banks with 102, 28 and 44 gpios.
|
|
Most pins are usually muxed to some other functionality by firmware,
|
|
so only a small amount is available for gpio use.
|
|
|
|
Requires ACPI device enumeration code to set up a platform device.
|
|
|
|
config PINCTRL_BCM2835
|
|
bool
|
|
select PINMUX
|
|
select PINCONF
|
|
|
|
config PINCTRL_BCM281XX
|
|
bool "Broadcom BCM281xx pinctrl driver"
|
|
depends on OF && (ARCH_BCM_MOBILE || COMPILE_TEST)
|
|
select PINMUX
|
|
select PINCONF
|
|
select GENERIC_PINCONF
|
|
select REGMAP_MMIO
|
|
help
|
|
Say Y here to support Broadcom BCM281xx pinctrl driver, which is used
|
|
for the BCM281xx SoC family, including BCM11130, BCM11140, BCM11351,
|
|
BCM28145, and BCM28155 SoCs. This driver requires the pinctrl
|
|
framework. GPIO is provided by a separate GPIO driver.
|
|
|
|
config PINCTRL_LANTIQ
|
|
bool
|
|
depends on LANTIQ
|
|
select PINMUX
|
|
select PINCONF
|
|
|
|
config PINCTRL_FALCON
|
|
bool
|
|
depends on SOC_FALCON
|
|
depends on PINCTRL_LANTIQ
|
|
|
|
config PINCTRL_ROCKCHIP
|
|
bool
|
|
select PINMUX
|
|
select GENERIC_PINCONF
|
|
select GENERIC_IRQ_CHIP
|
|
select MFD_SYSCON
|
|
|
|
config PINCTRL_SINGLE
|
|
tristate "One-register-per-pin type device tree based pinctrl driver"
|
|
depends on OF
|
|
select PINMUX
|
|
select PINCONF
|
|
select GENERIC_PINCONF
|
|
help
|
|
This selects the device tree based generic pinctrl driver.
|
|
|
|
config PINCTRL_SIRF
|
|
bool "CSR SiRFprimaII/SiRFmarco pin controller driver"
|
|
depends on ARCH_SIRF
|
|
select PINMUX
|
|
select GPIOLIB_IRQCHIP
|
|
|
|
config PINCTRL_ST
|
|
bool
|
|
depends on OF
|
|
select PINMUX
|
|
select PINCONF
|
|
select GPIOLIB_IRQCHIP
|
|
|
|
config PINCTRL_TEGRA
|
|
bool
|
|
select PINMUX
|
|
select PINCONF
|
|
|
|
config PINCTRL_TEGRA20
|
|
bool
|
|
select PINCTRL_TEGRA
|
|
|
|
config PINCTRL_TEGRA30
|
|
bool
|
|
select PINCTRL_TEGRA
|
|
|
|
config PINCTRL_TEGRA114
|
|
bool
|
|
select PINCTRL_TEGRA
|
|
|
|
config PINCTRL_TEGRA124
|
|
bool
|
|
select PINCTRL_TEGRA
|
|
|
|
config PINCTRL_TEGRA_XUSB
|
|
def_bool y if ARCH_TEGRA
|
|
select GENERIC_PHY
|
|
select PINCONF
|
|
select PINMUX
|
|
|
|
config PINCTRL_TZ1090
|
|
bool "Toumaz Xenif TZ1090 pin control driver"
|
|
depends on SOC_TZ1090
|
|
select PINMUX
|
|
select GENERIC_PINCONF
|
|
|
|
config PINCTRL_TZ1090_PDC
|
|
bool "Toumaz Xenif TZ1090 PDC pin control driver"
|
|
depends on SOC_TZ1090
|
|
select PINMUX
|
|
select PINCONF
|
|
|
|
config PINCTRL_U300
|
|
bool "U300 pin controller driver"
|
|
depends on ARCH_U300
|
|
select PINMUX
|
|
select GENERIC_PINCONF
|
|
|
|
config PINCTRL_COH901
|
|
bool "ST-Ericsson U300 COH 901 335/571 GPIO"
|
|
depends on GPIOLIB && ARCH_U300 && PINCTRL_U300
|
|
select GPIOLIB_IRQCHIP
|
|
help
|
|
Say yes here to support GPIO interface on ST-Ericsson U300.
|
|
The names of the two IP block variants supported are
|
|
COH 901 335 and COH 901 571/3. They contain 3, 5 or 7
|
|
ports of 8 GPIO pins each.
|
|
|
|
config PINCTRL_PALMAS
|
|
bool "Pinctrl driver for the PALMAS Series MFD devices"
|
|
depends on OF && MFD_PALMAS
|
|
select PINMUX
|
|
select GENERIC_PINCONF
|
|
help
|
|
Palmas device supports the configuration of pins for different
|
|
functionality. This driver supports the pinmux, push-pull and
|
|
open drain configuration for the Palmas series devices like
|
|
TPS65913, TPS80036 etc.
|
|
|
|
source "drivers/pinctrl/berlin/Kconfig"
|
|
source "drivers/pinctrl/freescale/Kconfig"
|
|
source "drivers/pinctrl/mvebu/Kconfig"
|
|
source "drivers/pinctrl/nomadik/Kconfig"
|
|
source "drivers/pinctrl/qcom/Kconfig"
|
|
source "drivers/pinctrl/samsung/Kconfig"
|
|
source "drivers/pinctrl/sh-pfc/Kconfig"
|
|
source "drivers/pinctrl/spear/Kconfig"
|
|
source "drivers/pinctrl/sunxi/Kconfig"
|
|
source "drivers/pinctrl/vt8500/Kconfig"
|
|
|
|
config PINCTRL_XWAY
|
|
bool
|
|
depends on SOC_TYPE_XWAY
|
|
depends on PINCTRL_LANTIQ
|
|
|
|
config PINCTRL_TB10X
|
|
bool
|
|
depends on ARC_PLAT_TB10X
|
|
|
|
endmenu
|
|
|
|
endif
|