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1b5d1a58a5
Requesting the GPIOD_OUT_LOW low will make sure the GPIO is deasserted when requested. The gpiolib core will make sure that if the GPIO line is active low, it will be logically driven high when deasserted, see drivers/gpiolib.c gpiod_configure_flags(). Cc: Sergej Sawazki <ce3a@gmx.de> Cc: Jyri Sarha <jsarha@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
272 lines
7.0 KiB
C
272 lines
7.0 KiB
C
/*
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* Copyright (C) 2013 - 2014 Texas Instruments Incorporated - http://www.ti.com
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*
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* Authors:
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* Jyri Sarha <jsarha@ti.com>
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* Sergej Sawazki <ce3a@gmx.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Gpio controlled clock implementation
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*/
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#include <linux/clk-provider.h>
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#include <linux/export.h>
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#include <linux/slab.h>
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#include <linux/gpio/consumer.h>
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#include <linux/err.h>
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/of_device.h>
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/**
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* DOC: basic gpio gated clock which can be enabled and disabled
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* with gpio output
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* Traits of this clock:
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* prepare - clk_(un)prepare only ensures parent is (un)prepared
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* enable - clk_enable and clk_disable are functional & control gpio
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* rate - inherits rate from parent. No clk_set_rate support
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* parent - fixed parent. No clk_set_parent support
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*/
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static int clk_gpio_gate_enable(struct clk_hw *hw)
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{
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struct clk_gpio *clk = to_clk_gpio(hw);
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gpiod_set_value(clk->gpiod, 1);
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return 0;
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}
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static void clk_gpio_gate_disable(struct clk_hw *hw)
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{
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struct clk_gpio *clk = to_clk_gpio(hw);
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gpiod_set_value(clk->gpiod, 0);
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}
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static int clk_gpio_gate_is_enabled(struct clk_hw *hw)
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{
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struct clk_gpio *clk = to_clk_gpio(hw);
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return gpiod_get_value(clk->gpiod);
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}
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const struct clk_ops clk_gpio_gate_ops = {
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.enable = clk_gpio_gate_enable,
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.disable = clk_gpio_gate_disable,
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.is_enabled = clk_gpio_gate_is_enabled,
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};
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EXPORT_SYMBOL_GPL(clk_gpio_gate_ops);
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/**
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* DOC: basic clock multiplexer which can be controlled with a gpio output
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* Traits of this clock:
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* prepare - clk_prepare only ensures that parents are prepared
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* rate - rate is only affected by parent switching. No clk_set_rate support
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* parent - parent is adjustable through clk_set_parent
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*/
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static u8 clk_gpio_mux_get_parent(struct clk_hw *hw)
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{
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struct clk_gpio *clk = to_clk_gpio(hw);
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return gpiod_get_value(clk->gpiod);
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}
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static int clk_gpio_mux_set_parent(struct clk_hw *hw, u8 index)
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{
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struct clk_gpio *clk = to_clk_gpio(hw);
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gpiod_set_value(clk->gpiod, index);
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return 0;
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}
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const struct clk_ops clk_gpio_mux_ops = {
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.get_parent = clk_gpio_mux_get_parent,
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.set_parent = clk_gpio_mux_set_parent,
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.determine_rate = __clk_mux_determine_rate,
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};
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EXPORT_SYMBOL_GPL(clk_gpio_mux_ops);
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static struct clk_hw *clk_register_gpio(struct device *dev, const char *name,
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const char * const *parent_names, u8 num_parents, struct gpio_desc *gpiod,
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unsigned long flags, const struct clk_ops *clk_gpio_ops)
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{
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struct clk_gpio *clk_gpio;
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struct clk_hw *hw;
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struct clk_init_data init = {};
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int err;
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if (dev)
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clk_gpio = devm_kzalloc(dev, sizeof(*clk_gpio), GFP_KERNEL);
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else
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clk_gpio = kzalloc(sizeof(*clk_gpio), GFP_KERNEL);
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if (!clk_gpio)
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return ERR_PTR(-ENOMEM);
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init.name = name;
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init.ops = clk_gpio_ops;
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init.flags = flags | CLK_IS_BASIC;
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init.parent_names = parent_names;
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init.num_parents = num_parents;
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clk_gpio->gpiod = gpiod;
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clk_gpio->hw.init = &init;
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hw = &clk_gpio->hw;
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if (dev)
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err = devm_clk_hw_register(dev, hw);
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else
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err = clk_hw_register(NULL, hw);
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if (!err)
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return hw;
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if (!dev) {
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kfree(clk_gpio);
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}
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return ERR_PTR(err);
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}
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/**
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* clk_hw_register_gpio_gate - register a gpio clock gate with the clock
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* framework
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* @dev: device that is registering this clock
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* @name: name of this clock
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* @parent_name: name of this clock's parent
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* @gpiod: gpio descriptor to gate this clock
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* @flags: clock flags
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*/
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struct clk_hw *clk_hw_register_gpio_gate(struct device *dev, const char *name,
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const char *parent_name, struct gpio_desc *gpiod,
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unsigned long flags)
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{
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return clk_register_gpio(dev, name,
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(parent_name ? &parent_name : NULL),
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(parent_name ? 1 : 0), gpiod, flags,
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&clk_gpio_gate_ops);
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}
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EXPORT_SYMBOL_GPL(clk_hw_register_gpio_gate);
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struct clk *clk_register_gpio_gate(struct device *dev, const char *name,
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const char *parent_name, struct gpio_desc *gpiod,
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unsigned long flags)
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{
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struct clk_hw *hw;
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hw = clk_hw_register_gpio_gate(dev, name, parent_name, gpiod, flags);
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if (IS_ERR(hw))
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return ERR_CAST(hw);
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return hw->clk;
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}
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EXPORT_SYMBOL_GPL(clk_register_gpio_gate);
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/**
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* clk_hw_register_gpio_mux - register a gpio clock mux with the clock framework
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* @dev: device that is registering this clock
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* @name: name of this clock
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* @parent_names: names of this clock's parents
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* @num_parents: number of parents listed in @parent_names
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* @gpiod: gpio descriptor to gate this clock
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* @flags: clock flags
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*/
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struct clk_hw *clk_hw_register_gpio_mux(struct device *dev, const char *name,
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const char * const *parent_names, u8 num_parents, struct gpio_desc *gpiod,
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unsigned long flags)
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{
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if (num_parents != 2) {
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pr_err("mux-clock %s must have 2 parents\n", name);
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return ERR_PTR(-EINVAL);
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}
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return clk_register_gpio(dev, name, parent_names, num_parents,
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gpiod, flags, &clk_gpio_mux_ops);
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}
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EXPORT_SYMBOL_GPL(clk_hw_register_gpio_mux);
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struct clk *clk_register_gpio_mux(struct device *dev, const char *name,
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const char * const *parent_names, u8 num_parents, struct gpio_desc *gpiod,
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unsigned long flags)
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{
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struct clk_hw *hw;
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hw = clk_hw_register_gpio_mux(dev, name, parent_names, num_parents,
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gpiod, flags);
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if (IS_ERR(hw))
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return ERR_CAST(hw);
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return hw->clk;
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}
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EXPORT_SYMBOL_GPL(clk_register_gpio_mux);
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static int gpio_clk_driver_probe(struct platform_device *pdev)
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{
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struct device_node *node = pdev->dev.of_node;
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const char **parent_names, *gpio_name;
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unsigned int num_parents;
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struct gpio_desc *gpiod;
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struct clk *clk;
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bool is_mux;
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int ret;
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num_parents = of_clk_get_parent_count(node);
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if (num_parents) {
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parent_names = devm_kcalloc(&pdev->dev, num_parents,
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sizeof(char *), GFP_KERNEL);
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if (!parent_names)
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return -ENOMEM;
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of_clk_parent_fill(node, parent_names, num_parents);
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} else {
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parent_names = NULL;
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}
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is_mux = of_device_is_compatible(node, "gpio-mux-clock");
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gpio_name = is_mux ? "select" : "enable";
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gpiod = devm_gpiod_get(&pdev->dev, gpio_name, GPIOD_OUT_LOW);
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if (IS_ERR(gpiod)) {
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ret = PTR_ERR(gpiod);
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if (ret == -EPROBE_DEFER)
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pr_debug("%s: %s: GPIOs not yet available, retry later\n",
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node->name, __func__);
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else
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pr_err("%s: %s: Can't get '%s' named GPIO property\n",
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node->name, __func__,
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gpio_name);
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return ret;
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}
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if (is_mux)
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clk = clk_register_gpio_mux(&pdev->dev, node->name,
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parent_names, num_parents, gpiod, 0);
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else
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clk = clk_register_gpio_gate(&pdev->dev, node->name,
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parent_names ? parent_names[0] : NULL, gpiod,
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0);
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if (IS_ERR(clk))
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return PTR_ERR(clk);
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return of_clk_add_provider(node, of_clk_src_simple_get, clk);
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}
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static const struct of_device_id gpio_clk_match_table[] = {
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{ .compatible = "gpio-mux-clock" },
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{ .compatible = "gpio-gate-clock" },
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{ }
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};
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static struct platform_driver gpio_clk_driver = {
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.probe = gpio_clk_driver_probe,
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.driver = {
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.name = "gpio-clk",
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.of_match_table = gpio_clk_match_table,
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},
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};
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builtin_platform_driver(gpio_clk_driver);
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