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67ece14431
A number of places establish a PTE in our top page table and immediately flush the TLB. Rather than having this at every callsite, provide an inline function for this purpose. This changes some global tlb flushes to be local; each time we setup one of these mappings, we always do it with preemption disabled which would prevent us migrating to another CPU. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
140 lines
3.1 KiB
C
140 lines
3.1 KiB
C
/*
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* arch/arm/mm/highmem.c -- ARM highmem support
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*
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* Author: Nicolas Pitre
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* Created: september 8, 2008
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* Copyright: Marvell Semiconductors Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/highmem.h>
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#include <linux/interrupt.h>
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#include <asm/fixmap.h>
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#include <asm/cacheflush.h>
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#include <asm/tlbflush.h>
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#include "mm.h"
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void *kmap(struct page *page)
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{
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might_sleep();
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if (!PageHighMem(page))
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return page_address(page);
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return kmap_high(page);
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}
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EXPORT_SYMBOL(kmap);
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void kunmap(struct page *page)
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{
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BUG_ON(in_interrupt());
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if (!PageHighMem(page))
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return;
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kunmap_high(page);
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}
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EXPORT_SYMBOL(kunmap);
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void *__kmap_atomic(struct page *page)
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{
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unsigned int idx;
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unsigned long vaddr;
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void *kmap;
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int type;
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pagefault_disable();
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if (!PageHighMem(page))
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return page_address(page);
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#ifdef CONFIG_DEBUG_HIGHMEM
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/*
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* There is no cache coherency issue when non VIVT, so force the
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* dedicated kmap usage for better debugging purposes in that case.
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*/
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if (!cache_is_vivt())
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kmap = NULL;
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else
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#endif
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kmap = kmap_high_get(page);
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if (kmap)
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return kmap;
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type = kmap_atomic_idx_push();
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idx = type + KM_TYPE_NR * smp_processor_id();
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vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
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#ifdef CONFIG_DEBUG_HIGHMEM
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/*
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* With debugging enabled, kunmap_atomic forces that entry to 0.
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* Make sure it was indeed properly unmapped.
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*/
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BUG_ON(!pte_none(*(TOP_PTE(vaddr))));
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#endif
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/*
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* When debugging is off, kunmap_atomic leaves the previous mapping
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* in place, so the contained TLB flush ensures the TLB is updated
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* with the new mapping.
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*/
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set_top_pte(vaddr, mk_pte(page, kmap_prot));
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return (void *)vaddr;
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}
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EXPORT_SYMBOL(__kmap_atomic);
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void __kunmap_atomic(void *kvaddr)
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{
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unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK;
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int idx, type;
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if (kvaddr >= (void *)FIXADDR_START) {
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type = kmap_atomic_idx();
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idx = type + KM_TYPE_NR * smp_processor_id();
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if (cache_is_vivt())
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__cpuc_flush_dcache_area((void *)vaddr, PAGE_SIZE);
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#ifdef CONFIG_DEBUG_HIGHMEM
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BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx));
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set_top_pte(vaddr, __pte(0));
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#else
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(void) idx; /* to kill a warning */
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#endif
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kmap_atomic_idx_pop();
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} else if (vaddr >= PKMAP_ADDR(0) && vaddr < PKMAP_ADDR(LAST_PKMAP)) {
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/* this address was obtained through kmap_high_get() */
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kunmap_high(pte_page(pkmap_page_table[PKMAP_NR(vaddr)]));
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}
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pagefault_enable();
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}
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EXPORT_SYMBOL(__kunmap_atomic);
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void *kmap_atomic_pfn(unsigned long pfn)
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{
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unsigned long vaddr;
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int idx, type;
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pagefault_disable();
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type = kmap_atomic_idx_push();
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idx = type + KM_TYPE_NR * smp_processor_id();
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vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
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#ifdef CONFIG_DEBUG_HIGHMEM
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BUG_ON(!pte_none(*(TOP_PTE(vaddr))));
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#endif
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set_top_pte(vaddr, pfn_pte(pfn, kmap_prot));
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return (void *)vaddr;
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}
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struct page *kmap_atomic_to_page(const void *ptr)
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{
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unsigned long vaddr = (unsigned long)ptr;
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pte_t *pte;
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if (vaddr < FIXADDR_START)
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return virt_to_page(ptr);
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pte = TOP_PTE(vaddr);
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return pte_page(*pte);
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}
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