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ACPICA commit 62f4f98e941d86e41969bf2ab5a93b8dc94dc49e The update includes userspace tool signons. Link: https://github.com/acpica/acpica/commit/62f4f98e Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
308 lines
8.3 KiB
C
308 lines
8.3 KiB
C
// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
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/******************************************************************************
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*
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* Name: hwsleep.c - ACPI Hardware Sleep/Wake Support functions for the
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* original/legacy sleep/PM registers.
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*
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* Copyright (C) 2000 - 2019, Intel Corp.
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*
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*****************************************************************************/
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#include <acpi/acpi.h>
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#include "accommon.h"
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#define _COMPONENT ACPI_HARDWARE
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ACPI_MODULE_NAME("hwsleep")
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#if (!ACPI_REDUCED_HARDWARE) /* Entire module */
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/*******************************************************************************
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*
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* FUNCTION: acpi_hw_legacy_sleep
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*
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* PARAMETERS: sleep_state - Which sleep state to enter
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*
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* RETURN: Status
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*
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* DESCRIPTION: Enter a system sleep state via the legacy FADT PM registers
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* THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED
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*
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******************************************************************************/
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acpi_status acpi_hw_legacy_sleep(u8 sleep_state)
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{
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struct acpi_bit_register_info *sleep_type_reg_info;
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struct acpi_bit_register_info *sleep_enable_reg_info;
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u32 pm1a_control;
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u32 pm1b_control;
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u32 in_value;
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acpi_status status;
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ACPI_FUNCTION_TRACE(hw_legacy_sleep);
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sleep_type_reg_info =
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acpi_hw_get_bit_register_info(ACPI_BITREG_SLEEP_TYPE);
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sleep_enable_reg_info =
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acpi_hw_get_bit_register_info(ACPI_BITREG_SLEEP_ENABLE);
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/* Clear wake status */
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status = acpi_write_bit_register(ACPI_BITREG_WAKE_STATUS,
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ACPI_CLEAR_STATUS);
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if (ACPI_FAILURE(status)) {
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return_ACPI_STATUS(status);
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}
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/* Disable all GPEs */
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status = acpi_hw_disable_all_gpes();
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if (ACPI_FAILURE(status)) {
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return_ACPI_STATUS(status);
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}
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status = acpi_hw_clear_acpi_status();
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if (ACPI_FAILURE(status)) {
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return_ACPI_STATUS(status);
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}
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acpi_gbl_system_awake_and_running = FALSE;
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/* Enable all wakeup GPEs */
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status = acpi_hw_enable_all_wakeup_gpes();
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if (ACPI_FAILURE(status)) {
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return_ACPI_STATUS(status);
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}
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/* Get current value of PM1A control */
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status = acpi_hw_register_read(ACPI_REGISTER_PM1_CONTROL,
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&pm1a_control);
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if (ACPI_FAILURE(status)) {
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return_ACPI_STATUS(status);
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}
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ACPI_DEBUG_PRINT((ACPI_DB_INIT,
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"Entering sleep state [S%u]\n", sleep_state));
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/* Clear the SLP_EN and SLP_TYP fields */
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pm1a_control &= ~(sleep_type_reg_info->access_bit_mask |
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sleep_enable_reg_info->access_bit_mask);
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pm1b_control = pm1a_control;
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/* Insert the SLP_TYP bits */
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pm1a_control |=
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(acpi_gbl_sleep_type_a << sleep_type_reg_info->bit_position);
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pm1b_control |=
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(acpi_gbl_sleep_type_b << sleep_type_reg_info->bit_position);
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/*
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* We split the writes of SLP_TYP and SLP_EN to workaround
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* poorly implemented hardware.
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*/
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/* Write #1: write the SLP_TYP data to the PM1 Control registers */
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status = acpi_hw_write_pm1_control(pm1a_control, pm1b_control);
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if (ACPI_FAILURE(status)) {
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return_ACPI_STATUS(status);
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}
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/* Insert the sleep enable (SLP_EN) bit */
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pm1a_control |= sleep_enable_reg_info->access_bit_mask;
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pm1b_control |= sleep_enable_reg_info->access_bit_mask;
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/* Flush caches, as per ACPI specification */
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ACPI_FLUSH_CPU_CACHE();
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status = acpi_os_enter_sleep(sleep_state, pm1a_control, pm1b_control);
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if (status == AE_CTRL_TERMINATE) {
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return_ACPI_STATUS(AE_OK);
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}
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if (ACPI_FAILURE(status)) {
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return_ACPI_STATUS(status);
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}
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/* Write #2: Write both SLP_TYP + SLP_EN */
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status = acpi_hw_write_pm1_control(pm1a_control, pm1b_control);
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if (ACPI_FAILURE(status)) {
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return_ACPI_STATUS(status);
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}
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if (sleep_state > ACPI_STATE_S3) {
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/*
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* We wanted to sleep > S3, but it didn't happen (by virtue of the
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* fact that we are still executing!)
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*
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* Wait ten seconds, then try again. This is to get S4/S5 to work on
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* all machines.
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*
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* We wait so long to allow chipsets that poll this reg very slowly
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* to still read the right value. Ideally, this block would go
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* away entirely.
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*/
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acpi_os_stall(10 * ACPI_USEC_PER_SEC);
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status = acpi_hw_register_write(ACPI_REGISTER_PM1_CONTROL,
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sleep_enable_reg_info->
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access_bit_mask);
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if (ACPI_FAILURE(status)) {
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return_ACPI_STATUS(status);
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}
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}
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/* Wait for transition back to Working State */
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do {
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status =
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acpi_read_bit_register(ACPI_BITREG_WAKE_STATUS, &in_value);
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if (ACPI_FAILURE(status)) {
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return_ACPI_STATUS(status);
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}
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} while (!in_value);
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return_ACPI_STATUS(AE_OK);
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}
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/*******************************************************************************
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*
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* FUNCTION: acpi_hw_legacy_wake_prep
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*
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* PARAMETERS: sleep_state - Which sleep state we just exited
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*
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* RETURN: Status
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*
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* DESCRIPTION: Perform the first state of OS-independent ACPI cleanup after a
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* sleep.
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* Called with interrupts ENABLED.
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*
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******************************************************************************/
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acpi_status acpi_hw_legacy_wake_prep(u8 sleep_state)
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{
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acpi_status status;
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struct acpi_bit_register_info *sleep_type_reg_info;
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struct acpi_bit_register_info *sleep_enable_reg_info;
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u32 pm1a_control;
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u32 pm1b_control;
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ACPI_FUNCTION_TRACE(hw_legacy_wake_prep);
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/*
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* Set SLP_TYPE and SLP_EN to state S0.
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* This is unclear from the ACPI Spec, but it is required
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* by some machines.
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*/
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status = acpi_get_sleep_type_data(ACPI_STATE_S0,
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&acpi_gbl_sleep_type_a,
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&acpi_gbl_sleep_type_b);
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if (ACPI_SUCCESS(status)) {
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sleep_type_reg_info =
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acpi_hw_get_bit_register_info(ACPI_BITREG_SLEEP_TYPE);
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sleep_enable_reg_info =
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acpi_hw_get_bit_register_info(ACPI_BITREG_SLEEP_ENABLE);
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/* Get current value of PM1A control */
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status = acpi_hw_register_read(ACPI_REGISTER_PM1_CONTROL,
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&pm1a_control);
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if (ACPI_SUCCESS(status)) {
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/* Clear the SLP_EN and SLP_TYP fields */
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pm1a_control &= ~(sleep_type_reg_info->access_bit_mask |
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sleep_enable_reg_info->
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access_bit_mask);
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pm1b_control = pm1a_control;
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/* Insert the SLP_TYP bits */
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pm1a_control |= (acpi_gbl_sleep_type_a <<
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sleep_type_reg_info->bit_position);
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pm1b_control |= (acpi_gbl_sleep_type_b <<
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sleep_type_reg_info->bit_position);
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/* Write the control registers and ignore any errors */
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(void)acpi_hw_write_pm1_control(pm1a_control,
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pm1b_control);
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}
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}
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return_ACPI_STATUS(status);
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}
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/*******************************************************************************
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*
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* FUNCTION: acpi_hw_legacy_wake
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*
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* PARAMETERS: sleep_state - Which sleep state we just exited
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*
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* RETURN: Status
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*
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* DESCRIPTION: Perform OS-independent ACPI cleanup after a sleep
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* Called with interrupts ENABLED.
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*
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******************************************************************************/
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acpi_status acpi_hw_legacy_wake(u8 sleep_state)
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{
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acpi_status status;
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ACPI_FUNCTION_TRACE(hw_legacy_wake);
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/* Ensure enter_sleep_state_prep -> enter_sleep_state ordering */
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acpi_gbl_sleep_type_a = ACPI_SLEEP_TYPE_INVALID;
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acpi_hw_execute_sleep_method(METHOD_PATHNAME__SST, ACPI_SST_WAKING);
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/*
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* GPEs must be enabled before _WAK is called as GPEs
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* might get fired there
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*
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* Restore the GPEs:
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* 1) Disable all GPEs
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* 2) Enable all runtime GPEs
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*/
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status = acpi_hw_disable_all_gpes();
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if (ACPI_FAILURE(status)) {
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return_ACPI_STATUS(status);
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}
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status = acpi_hw_enable_all_runtime_gpes();
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if (ACPI_FAILURE(status)) {
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return_ACPI_STATUS(status);
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}
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/*
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* Now we can execute _WAK, etc. Some machines require that the GPEs
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* are enabled before the wake methods are executed.
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*/
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acpi_hw_execute_sleep_method(METHOD_PATHNAME__WAK, sleep_state);
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/*
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* Some BIOS code assumes that WAK_STS will be cleared on resume
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* and use it to determine whether the system is rebooting or
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* resuming. Clear WAK_STS for compatibility.
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*/
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(void)acpi_write_bit_register(ACPI_BITREG_WAKE_STATUS,
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ACPI_CLEAR_STATUS);
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acpi_gbl_system_awake_and_running = TRUE;
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/* Enable power button */
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(void)
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acpi_write_bit_register(acpi_gbl_fixed_event_info
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[ACPI_EVENT_POWER_BUTTON].
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enable_register_id, ACPI_ENABLE_EVENT);
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(void)
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acpi_write_bit_register(acpi_gbl_fixed_event_info
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[ACPI_EVENT_POWER_BUTTON].
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status_register_id, ACPI_CLEAR_STATUS);
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acpi_hw_execute_sleep_method(METHOD_PATHNAME__SST, ACPI_SST_WORKING);
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return_ACPI_STATUS(status);
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}
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#endif /* !ACPI_REDUCED_HARDWARE */
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