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67905540e8
Most of the Allwinner SoCs (at this time, all but the A10) also have a
High Speed timers that are not using the 24MHz oscillator as a source
but rather the AHB clock running much faster.
The IP is slightly different between the A10s/A13 and the one used in
the A20/A31, since the latter have 4 timers available, while the former
have only 2 of them.
[dlezcano] : Fixed conflict with b788beda "Order Kconfig options
alphabetically"
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
16 lines
333 B
Plaintext
16 lines
333 B
Plaintext
config ARCH_SUNXI
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bool "Allwinner A1X SOCs" if ARCH_MULTI_V7
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select ARCH_REQUIRE_GPIOLIB
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select ARM_GIC
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select CLKSRC_MMIO
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select CLKSRC_OF
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select COMMON_CLK
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select GENERIC_CLOCKEVENTS
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select GENERIC_IRQ_CHIP
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select HAVE_SMP
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select PINCTRL
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select PINCTRL_SUNXI
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select SPARSE_IRQ
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select SUN4I_TIMER
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select SUN5I_HSTIMER
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