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4ef1a30c6b
This is some material that we picked up into our tree late, or that had more complex dependencies on more than one topic branch that makes sense to keep separately. - TI support for secure accelerators and hwrng on OMAP4/5 - TI camera changes for dra7 and am437x and SGX improvement due to better reset control support on am335x, am437x and dra7 - Davinci moves to proper clocksource on DM365, and regulator/audio improvements for DM365 and DM644x eval boards -----BEGIN PGP SIGNATURE----- iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAl4+lnYPHG9sb2ZAbGl4 b20ubmV0AAoJEIwa5zzehBx3wZAP/3wtT+fr/obB/62XkEsVMXl4PZolG/EpJM7j RlPCFSr9C5ik9PyvoKqbJHkyrTlzF8Op8Qbv7oVisPbAJ+/qpGF+xFI6ieJD1HGF TAz1prNo57ZJ6BXm/oTWmQggjxuQVdo/mqeQC3812qRNH7lo3495S3EivuRbzs3u Cs7d29uQHUmpeGrK8R1+co0yV38oMWtUgNRF+UxZH0YdegtITDfg2Af4wqWkvM+8 eqsvQS5V9OaC4t8efP1PzqtUYkOmzua2wzFeubZY513Gpxzl1iKIGLjI+MbfzMp4 RiYftHXj9Jvx00Zg9qGm0Zpw8RwRsY7DyvDFctg3PLvVVgnpjZbPpgD5ttn2YouS AgsZBtp4h6ydZTxWeZxZOOrn/9n7TGr2SK0I4ijPJIIAPYTQgn6S8P8ELHtNRGj7 tOMP217ozzHi9uQUmyRCNFCqO4pT7sFJJsET0KzDqH9tTSaEZjVx0y2yNn1p70HO Pv1WqBuniaqVjgn40LcEVbCStgJXDrxejOG9OF92FbqVcrJp9dHsXrIKtkO0WHuF PtEIKcmwyJ3asns/+HeOIBwJHb5KJ+D2BR+T9K/hZnm8hPcHaZuKGuO/OcucILDk q3TYKc/nPRBdimKJWyzKlQqtZkbXbCOiApP17iNtLuEtZjf40HOgnBj3LqVH9Jqc J34LGMlR =R7GU -----END PGP SIGNATURE----- Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC late updates from Olof Johansson: "This is some material that we picked up into our tree late, or that had more complex dependencies on more than one topic branch that makes sense to keep separately. - TI support for secure accelerators and hwrng on OMAP4/5 - TI camera changes for dra7 and am437x and SGX improvement due to better reset control support on am335x, am437x and dra7 - Davinci moves to proper clocksource on DM365, and regulator/audio improvements for DM365 and DM644x eval boards" * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (32 commits) ARM: dts: omap4-droid4: Enable hdq for droid4 ds250x 1-wire battery nvmem ARM: dts: motorola-cpcap-mapphone: Configure calibration interrupt ARM: dts: Configure interconnect target module for am437x sgx ARM: dts: Configure sgx for dra7 ARM: dts: Configure rstctrl reset for am335x SGX ARM: dts: dra7: Add ti-sysc node for VPE ARM: dts: dra7: add vpe clkctrl node ARM: dts: am43x-epos-evm: Add VPFE and OV2659 entries ARM: dts: am437x-sk-evm: Add VPFE and OV2659 entries ARM: dts: am43xx: add support for clkout1 clock arm: dts: dra76-evm: Add CAL and OV5640 nodes arm: dtsi: dra76x: Add CAL dtsi node arm: dts: dra72-evm-common: Add entries for the CSI2 cameras ARM: dts: DRA72: Add CAL dtsi node ARM: dts: dra7-l4: Add ti-sysc node for CAM ARM: OMAP: DRA7xx: Make CAM clock domain SWSUP only ARM: dts: dra7: add cam clkctrl node ARM: OMAP2+: Drop legacy platform data for omap4 des ARM: OMAP2+: Drop legacy platform data for omap4 sham ARM: OMAP2+: Drop legacy platform data for omap4 aes ...
305 lines
7.3 KiB
C
305 lines
7.3 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* mach-davinci/devices.c
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*
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* DaVinci platform device setup/initialization
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/platform_data/i2c-davinci.h>
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#include <linux/platform_data/mmc-davinci.h>
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#include <linux/platform_data/edma.h>
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#include <linux/dma-mapping.h>
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#include <linux/io.h>
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#include <linux/reboot.h>
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#include <mach/hardware.h>
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#include <mach/cputype.h>
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#include <mach/mux.h>
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#include "davinci.h"
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#include "irqs.h"
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#define DAVINCI_I2C_BASE 0x01C21000
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#define DAVINCI_ATA_BASE 0x01C66000
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#define DAVINCI_MMCSD0_BASE 0x01E10000
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#define DM355_MMCSD0_BASE 0x01E11000
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#define DM355_MMCSD1_BASE 0x01E00000
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#define DM365_MMCSD0_BASE 0x01D11000
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#define DM365_MMCSD1_BASE 0x01D00000
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void __iomem *davinci_sysmod_base;
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void davinci_map_sysmod(void)
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{
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davinci_sysmod_base = ioremap(DAVINCI_SYSTEM_MODULE_BASE,
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0x800);
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/*
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* Throw a bug since a lot of board initialization code depends
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* on system module availability. ioremap() failing this early
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* need careful looking into anyway.
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*/
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BUG_ON(!davinci_sysmod_base);
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}
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static struct resource i2c_resources[] = {
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{
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.start = DAVINCI_I2C_BASE,
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.end = DAVINCI_I2C_BASE + 0x40,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = DAVINCI_INTC_IRQ(IRQ_I2C),
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device davinci_i2c_device = {
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.name = "i2c_davinci",
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.id = 1,
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.num_resources = ARRAY_SIZE(i2c_resources),
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.resource = i2c_resources,
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};
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void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
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{
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if (cpu_is_davinci_dm644x())
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davinci_cfg_reg(DM644X_I2C);
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davinci_i2c_device.dev.platform_data = pdata;
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(void) platform_device_register(&davinci_i2c_device);
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}
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static struct resource ide_resources[] = {
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{
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.start = DAVINCI_ATA_BASE,
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.end = DAVINCI_ATA_BASE + 0x7ff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = DAVINCI_INTC_IRQ(IRQ_IDE),
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.end = DAVINCI_INTC_IRQ(IRQ_IDE),
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 ide_dma_mask = DMA_BIT_MASK(32);
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static struct platform_device ide_device = {
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.name = "palm_bk3710",
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.id = -1,
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.resource = ide_resources,
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.num_resources = ARRAY_SIZE(ide_resources),
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.dev = {
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.dma_mask = &ide_dma_mask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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};
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void __init davinci_init_ide(void)
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{
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if (cpu_is_davinci_dm644x()) {
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davinci_cfg_reg(DM644X_HPIEN_DISABLE);
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davinci_cfg_reg(DM644X_ATAEN);
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davinci_cfg_reg(DM644X_HDIREN);
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} else if (cpu_is_davinci_dm646x()) {
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/* IRQ_DM646X_IDE is the same as IRQ_IDE */
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davinci_cfg_reg(DM646X_ATAEN);
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} else {
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WARN_ON(1);
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return;
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}
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platform_device_register(&ide_device);
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}
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#if IS_ENABLED(CONFIG_MMC_DAVINCI)
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static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);
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static struct resource mmcsd0_resources[] = {
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{
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/* different on dm355 */
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.start = DAVINCI_MMCSD0_BASE,
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.end = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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/* IRQs: MMC/SD, then SDIO */
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{
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.start = DAVINCI_INTC_IRQ(IRQ_MMCINT),
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.flags = IORESOURCE_IRQ,
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}, {
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/* different on dm355 */
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.start = DAVINCI_INTC_IRQ(IRQ_SDIOINT),
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device davinci_mmcsd0_device = {
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.name = "dm6441-mmc",
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.id = 0,
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.dev = {
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.dma_mask = &mmcsd0_dma_mask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.num_resources = ARRAY_SIZE(mmcsd0_resources),
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.resource = mmcsd0_resources,
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};
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static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);
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static struct resource mmcsd1_resources[] = {
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{
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.start = DM355_MMCSD1_BASE,
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.end = DM355_MMCSD1_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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/* IRQs: MMC/SD, then SDIO */
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{
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.start = DAVINCI_INTC_IRQ(IRQ_DM355_MMCINT1),
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.flags = IORESOURCE_IRQ,
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}, {
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.start = DAVINCI_INTC_IRQ(IRQ_DM355_SDIOINT1),
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device davinci_mmcsd1_device = {
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.name = "dm6441-mmc",
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.id = 1,
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.dev = {
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.dma_mask = &mmcsd1_dma_mask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.num_resources = ARRAY_SIZE(mmcsd1_resources),
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.resource = mmcsd1_resources,
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};
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void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
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{
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struct platform_device *pdev = NULL;
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if (WARN_ON(cpu_is_davinci_dm646x()))
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return;
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/* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too;
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* for example if MMCSD1 is used for SDIO, maybe DAT2 is unused.
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*
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* FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are
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* not handled right here ...
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*/
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switch (module) {
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case 1:
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if (cpu_is_davinci_dm355()) {
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/* REVISIT we may not need all these pins if e.g. this
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* is a hard-wired SDIO device...
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*/
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davinci_cfg_reg(DM355_SD1_CMD);
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davinci_cfg_reg(DM355_SD1_CLK);
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davinci_cfg_reg(DM355_SD1_DATA0);
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davinci_cfg_reg(DM355_SD1_DATA1);
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davinci_cfg_reg(DM355_SD1_DATA2);
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davinci_cfg_reg(DM355_SD1_DATA3);
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} else if (cpu_is_davinci_dm365()) {
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/* Configure pull down control */
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unsigned v;
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v = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
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__raw_writel(v & ~0xfc0,
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DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
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mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
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mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
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SZ_4K - 1;
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mmcsd1_resources[2].start = DAVINCI_INTC_IRQ(
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IRQ_DM365_SDIOINT1);
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davinci_mmcsd1_device.name = "da830-mmc";
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} else
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break;
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pdev = &davinci_mmcsd1_device;
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break;
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case 0:
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if (cpu_is_davinci_dm355()) {
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mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
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mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
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mmcsd0_resources[2].start = DAVINCI_INTC_IRQ(
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IRQ_DM355_SDIOINT0);
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/* expose all 6 MMC0 signals: CLK, CMD, DATA[0..3] */
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davinci_cfg_reg(DM355_MMCSD0);
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/* enable RX EDMA */
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davinci_cfg_reg(DM355_EVT26_MMC0_RX);
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} else if (cpu_is_davinci_dm365()) {
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mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
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mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
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SZ_4K - 1;
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mmcsd0_resources[2].start = DAVINCI_INTC_IRQ(
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IRQ_DM365_SDIOINT0);
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davinci_mmcsd0_device.name = "da830-mmc";
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} else if (cpu_is_davinci_dm644x()) {
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/* REVISIT: should this be in board-init code? */
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/* Power-on 3.3V IO cells */
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__raw_writel(0,
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DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
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/*Set up the pull regiter for MMC */
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davinci_cfg_reg(DM644X_MSTK);
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}
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pdev = &davinci_mmcsd0_device;
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break;
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}
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if (WARN_ON(!pdev))
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return;
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pdev->dev.platform_data = config;
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platform_device_register(pdev);
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}
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#else
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void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
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{
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}
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#endif
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/*-------------------------------------------------------------------------*/
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static struct resource wdt_resources[] = {
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{
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.start = DAVINCI_WDOG_BASE,
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.end = DAVINCI_WDOG_BASE + SZ_1K - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device davinci_wdt_device = {
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.name = "davinci-wdt",
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.id = -1,
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.num_resources = ARRAY_SIZE(wdt_resources),
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.resource = wdt_resources,
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};
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int davinci_init_wdt(void)
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{
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return platform_device_register(&davinci_wdt_device);
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}
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static struct platform_device davinci_gpio_device = {
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.name = "davinci_gpio",
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.id = -1,
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};
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int davinci_gpio_register(struct resource *res, int size, void *pdata)
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{
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davinci_gpio_device.resource = res;
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davinci_gpio_device.num_resources = size;
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davinci_gpio_device.dev.platform_data = pdata;
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return platform_device_register(&davinci_gpio_device);
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}
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