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9f9a726546
Resetting the VSC73xx PHY was problematic because the MDIO bus, without a busy check, read and wrote incorrect register values. My investigation indicates that resetting the PHY only triggers changes in configuration. However, improper register values written earlier were only exposed after a soft reset. The reset itself wasn't the issue; rather, the problem stemmed from incorrect read and write operations. A 'soft_reset' can now proceed normally. There are no reasons to keep the VSC73xx from being reset. This commit removes the reset blockade in the 'vsc73xx_phy_write' function. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net> |
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| .. | ||
| b53 | ||
| hirschmann | ||
| microchip | ||
| mv88e6xxx | ||
| ocelot | ||
| qca | ||
| realtek | ||
| sja1105 | ||
| xrs700x | ||
| bcm_sf2_cfp.c | ||
| bcm_sf2_regs.h | ||
| bcm_sf2.c | ||
| bcm_sf2.h | ||
| dsa_loop_bdinfo.c | ||
| dsa_loop.c | ||
| dsa_loop.h | ||
| Kconfig | ||
| lan9303_i2c.c | ||
| lan9303_mdio.c | ||
| lan9303-core.c | ||
| lan9303.h | ||
| lantiq_gswip.c | ||
| lantiq_pce.h | ||
| Makefile | ||
| mt7530-mdio.c | ||
| mt7530-mmio.c | ||
| mt7530.c | ||
| mt7530.h | ||
| mv88e6060.c | ||
| mv88e6060.h | ||
| rzn1_a5psw.c | ||
| rzn1_a5psw.h | ||
| vitesse-vsc73xx-core.c | ||
| vitesse-vsc73xx-platform.c | ||
| vitesse-vsc73xx-spi.c | ||
| vitesse-vsc73xx.h | ||