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https://github.com/torvalds/linux.git
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c9f33436d8
* Support for NUMA (via SRAT and SLIT), console output (via SPCR), and cache info (via PPTT) on ACPI-based systems. * The trap entry/exit code no longer breaks the return address stack predictor on many systems, which results in an improvement to trap latency. * Support for HAVE_ARCH_STACKLEAK. * The sv39 linear map has been extended to support 128GiB mappings. * The frequency of the mtime CSR is now visible via hwprobe. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAmaj2EYTHHBhbG1lckBk YWJiZWx0LmNvbQAKCRAuExnzX7sYiVG3D/9kNHTI09iPDJd6fTChE3cpMxy7xXXE URX3Avu+gYsJmIbYyg4RnQ8FGFN7icKBCrQqs7JmLliU0NU+YMcCcjsJA2QaivbD VAlaex1qNcvNGteHrpbqhr3Zs4zw8GlBkB3KFTLyPAp61bybGo0a/A5ONJ7ScQIW RWHewAPgb86cQ0Q34JpO87TqvMM0KMvhQP5dip+olaFjLRBzhXmGFZfHqA80kTWl 0ytYclVCHZMtO/5mnQpuIOVs1IKw9L4wa0sivOQF0iLTqfKDFALa6yZsThHA/w3e JVuBAdQhcPZ3fgO2fUfJPlW16GmRC2/tdiFg5NFw8k4vo7DYBwX55ztPKXqDrJDM 8ah85IeLiPar/A/uHdn6bPjK+aGMuzklKF50r62XXAc2fL8mza1sdvKCVOy2EOLn JyGI9c/10KpvN/DW8g7hPefhvbx4+tCKkFcPqf++VQha6W8cQdCKi+Li0Pm8TTnp XPQjIvSlDDG1Pl4ofgBSFoyB8pkBXNzvv8NZp+YYtnqSOLAKaZuP+KwA8TwHdvGM pdCXcL3KHiLy4/pJWEoNTutD0mbJ7PUIb2P/KkjqYDgp4F1n0Hg+/aeSIp+7a4Pv yTBctIGxrlriQMIdtWCR8tyhcPP4pDpGYkW0K15EE16G0NK0fjD89LEXYqT6ae2R C0QgiwnVe/eopg== =zeUn -----END PGP SIGNATURE----- Merge tag 'riscv-for-linus-6.11-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull more RISC-V updates from Palmer Dabbelt: - Support for NUMA (via SRAT and SLIT), console output (via SPCR), and cache info (via PPTT) on ACPI-based systems. - The trap entry/exit code no longer breaks the return address stack predictor on many systems, which results in an improvement to trap latency. - Support for HAVE_ARCH_STACKLEAK. - The sv39 linear map has been extended to support 128GiB mappings. - The frequency of the mtime CSR is now visible via hwprobe. * tag 'riscv-for-linus-6.11-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (21 commits) RISC-V: Provide the frequency of time CSR via hwprobe riscv: Extend sv39 linear mapping max size to 128G riscv: enable HAVE_ARCH_STACKLEAK riscv: signal: Remove unlikely() from WARN_ON() condition riscv: Improve exception and system call latency RISC-V: Select ACPI PPTT drivers riscv: cacheinfo: initialize cacheinfo's level and type from ACPI PPTT riscv: cacheinfo: remove the useless input parameter (node) of ci_leaf_init() RISC-V: ACPI: Enable SPCR table for console output on RISC-V riscv: boot: remove duplicated targets line trace: riscv: Remove deprecated kprobe on ftrace support riscv: cpufeature: Extract common elements from extension checking riscv: Introduce vendor variants of extension helpers riscv: Add vendor extensions to /proc/cpuinfo riscv: Extend cpufeature.c to detect vendor extensions RISC-V: run savedefconfig for defconfig RISC-V: hwprobe: sort EXT_KEY()s in hwprobe_isa_ext0() alphabetically ACPI: NUMA: replace pr_info with pr_debug in arch_acpi_numa_init ACPI: NUMA: change the ACPI_NUMA to a hidden option ACPI: NUMA: Add handler for SRAT RINTC affinity structure ...
721 lines
21 KiB
Plaintext
721 lines
21 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0
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config LOONGARCH
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bool
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default y
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select ACPI
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select ACPI_GENERIC_GSI if ACPI
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select ACPI_MCFG if ACPI
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select ACPI_HOTPLUG_CPU if ACPI_PROCESSOR && HOTPLUG_CPU
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select ACPI_PPTT if ACPI
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select ACPI_SYSTEM_POWER_STATES_SUPPORT if ACPI
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select ARCH_BINFMT_ELF_STATE
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select ARCH_DISABLE_KASAN_INLINE
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select ARCH_ENABLE_MEMORY_HOTPLUG
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select ARCH_ENABLE_MEMORY_HOTREMOVE
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select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE
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select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI
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select ARCH_HAS_CPU_FINALIZE_INIT
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select ARCH_HAS_CURRENT_STACK_POINTER
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select ARCH_HAS_DEBUG_VM_PGTABLE
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select ARCH_HAS_FAST_MULTIPLIER
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select ARCH_HAS_FORTIFY_SOURCE
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select ARCH_HAS_KCOV
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select ARCH_HAS_KERNEL_FPU_SUPPORT if CPU_HAS_FPU
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select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS
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select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE
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select ARCH_HAS_PTE_DEVMAP
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select ARCH_HAS_PTE_SPECIAL
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select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
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select ARCH_INLINE_READ_LOCK if !PREEMPTION
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select ARCH_INLINE_READ_LOCK_BH if !PREEMPTION
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select ARCH_INLINE_READ_LOCK_IRQ if !PREEMPTION
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select ARCH_INLINE_READ_LOCK_IRQSAVE if !PREEMPTION
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select ARCH_INLINE_READ_UNLOCK if !PREEMPTION
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select ARCH_INLINE_READ_UNLOCK_BH if !PREEMPTION
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select ARCH_INLINE_READ_UNLOCK_IRQ if !PREEMPTION
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select ARCH_INLINE_READ_UNLOCK_IRQRESTORE if !PREEMPTION
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select ARCH_INLINE_WRITE_LOCK if !PREEMPTION
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select ARCH_INLINE_WRITE_LOCK_BH if !PREEMPTION
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select ARCH_INLINE_WRITE_LOCK_IRQ if !PREEMPTION
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select ARCH_INLINE_WRITE_LOCK_IRQSAVE if !PREEMPTION
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select ARCH_INLINE_WRITE_UNLOCK if !PREEMPTION
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select ARCH_INLINE_WRITE_UNLOCK_BH if !PREEMPTION
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select ARCH_INLINE_WRITE_UNLOCK_IRQ if !PREEMPTION
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select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE if !PREEMPTION
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select ARCH_INLINE_SPIN_TRYLOCK if !PREEMPTION
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select ARCH_INLINE_SPIN_TRYLOCK_BH if !PREEMPTION
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select ARCH_INLINE_SPIN_LOCK if !PREEMPTION
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select ARCH_INLINE_SPIN_LOCK_BH if !PREEMPTION
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select ARCH_INLINE_SPIN_LOCK_IRQ if !PREEMPTION
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select ARCH_INLINE_SPIN_LOCK_IRQSAVE if !PREEMPTION
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select ARCH_INLINE_SPIN_UNLOCK if !PREEMPTION
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select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION
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select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION
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select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION
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select ARCH_KEEP_MEMBLOCK
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select ARCH_MIGHT_HAVE_PC_PARPORT
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select ARCH_MIGHT_HAVE_PC_SERIO
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select ARCH_SPARSEMEM_ENABLE
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select ARCH_STACKWALK
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select ARCH_SUPPORTS_ACPI
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select ARCH_SUPPORTS_ATOMIC_RMW
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select ARCH_SUPPORTS_HUGETLBFS
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select ARCH_SUPPORTS_INT128 if CC_HAS_INT128
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select ARCH_SUPPORTS_LTO_CLANG
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select ARCH_SUPPORTS_LTO_CLANG_THIN
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select ARCH_SUPPORTS_NUMA_BALANCING
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select ARCH_USE_BUILTIN_BSWAP
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select ARCH_USE_CMPXCHG_LOCKREF
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select ARCH_USE_QUEUED_RWLOCKS
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select ARCH_USE_QUEUED_SPINLOCKS
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select ARCH_WANT_DEFAULT_BPF_JIT
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select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT
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select ARCH_WANT_LD_ORPHAN_WARN
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select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP
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select ARCH_WANTS_NO_INSTR
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select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE
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select BUILDTIME_TABLE_SORT
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select COMMON_CLK
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select CPU_PM
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select EFI
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select GENERIC_CLOCKEVENTS
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select GENERIC_CMOS_UPDATE
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select GENERIC_CPU_AUTOPROBE
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select GENERIC_CPU_DEVICES
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select GENERIC_ENTRY
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select GENERIC_GETTIMEOFDAY
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select GENERIC_IOREMAP if !ARCH_IOREMAP
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select GENERIC_IRQ_MULTI_HANDLER
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select GENERIC_IRQ_PROBE
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select GENERIC_IRQ_SHOW
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select GENERIC_LIB_ASHLDI3
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select GENERIC_LIB_ASHRDI3
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select GENERIC_LIB_CMPDI2
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select GENERIC_LIB_LSHRDI3
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select GENERIC_LIB_UCMPDI2
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select GENERIC_LIB_DEVMEM_IS_ALLOWED
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select GENERIC_PCI_IOMAP
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select GENERIC_SCHED_CLOCK
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select GENERIC_SMP_IDLE_THREAD
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select GENERIC_TIME_VSYSCALL
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select GENERIC_VDSO_TIME_NS
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select GPIOLIB
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select HAS_IOPORT
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select HAVE_ARCH_AUDITSYSCALL
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select HAVE_ARCH_JUMP_LABEL
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select HAVE_ARCH_JUMP_LABEL_RELATIVE
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select HAVE_ARCH_KASAN
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select HAVE_ARCH_KFENCE
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select HAVE_ARCH_KGDB if PERF_EVENTS
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select HAVE_ARCH_MMAP_RND_BITS if MMU
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select HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET
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select HAVE_ARCH_SECCOMP
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select HAVE_ARCH_SECCOMP_FILTER
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select HAVE_ARCH_TRACEHOOK
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select HAVE_ARCH_TRANSPARENT_HUGEPAGE
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select HAVE_ARCH_USERFAULTFD_MINOR if USERFAULTFD
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select HAVE_ASM_MODVERSIONS
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select HAVE_CONTEXT_TRACKING_USER
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select HAVE_C_RECORDMCOUNT
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select HAVE_DEBUG_KMEMLEAK
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select HAVE_DEBUG_STACKOVERFLOW
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select HAVE_DMA_CONTIGUOUS
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select HAVE_DYNAMIC_FTRACE
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select HAVE_DYNAMIC_FTRACE_WITH_ARGS
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select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS
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select HAVE_DYNAMIC_FTRACE_WITH_REGS
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select HAVE_EBPF_JIT
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select HAVE_EFFICIENT_UNALIGNED_ACCESS if !ARCH_STRICT_ALIGN
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select HAVE_EXIT_THREAD
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select HAVE_GUP_FAST
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select HAVE_FTRACE_MCOUNT_RECORD
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select HAVE_FUNCTION_ARG_ACCESS_API
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select HAVE_FUNCTION_ERROR_INJECTION
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select HAVE_FUNCTION_GRAPH_RETVAL if HAVE_FUNCTION_GRAPH_TRACER
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select HAVE_FUNCTION_GRAPH_TRACER
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select HAVE_FUNCTION_TRACER
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select HAVE_GCC_PLUGINS
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select HAVE_GENERIC_VDSO
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select HAVE_HW_BREAKPOINT if PERF_EVENTS
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select HAVE_IOREMAP_PROT
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select HAVE_IRQ_EXIT_ON_IRQ_STACK
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select HAVE_IRQ_TIME_ACCOUNTING
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select HAVE_KPROBES
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select HAVE_KPROBES_ON_FTRACE
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select HAVE_KRETPROBES
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select HAVE_LIVEPATCH
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select HAVE_MOD_ARCH_SPECIFIC
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select HAVE_NMI
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select HAVE_OBJTOOL if AS_HAS_EXPLICIT_RELOCS && AS_HAS_THIN_ADD_SUB && !CC_IS_CLANG
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select HAVE_PCI
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select HAVE_PERF_EVENTS
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select HAVE_PERF_REGS
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select HAVE_PERF_USER_STACK_DUMP
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select HAVE_PREEMPT_DYNAMIC_KEY
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select HAVE_REGS_AND_STACK_ACCESS_API
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select HAVE_RELIABLE_STACKTRACE if UNWINDER_ORC
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select HAVE_RETHOOK
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select HAVE_RSEQ
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select HAVE_RUST
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select HAVE_SAMPLE_FTRACE_DIRECT
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select HAVE_SAMPLE_FTRACE_DIRECT_MULTI
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select HAVE_SETUP_PER_CPU_AREA if NUMA
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select HAVE_STACK_VALIDATION if HAVE_OBJTOOL
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select HAVE_STACKPROTECTOR
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select HAVE_SYSCALL_TRACEPOINTS
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select HAVE_TIF_NOHZ
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select HAVE_VIRT_CPU_ACCOUNTING_GEN if !SMP
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select IRQ_FORCED_THREADING
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select IRQ_LOONGARCH_CPU
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select LOCK_MM_AND_FIND_VMA
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select MMU_GATHER_MERGE_VMAS if MMU
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select MODULES_USE_ELF_RELA if MODULES
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select NEED_PER_CPU_EMBED_FIRST_CHUNK
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select NEED_PER_CPU_PAGE_FIRST_CHUNK
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select OF
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select OF_EARLY_FLATTREE
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select PCI
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select PCI_DOMAINS_GENERIC
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select PCI_ECAM if ACPI
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select PCI_LOONGSON
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select PCI_MSI_ARCH_FALLBACKS
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select PCI_QUIRKS
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select PERF_USE_VMALLOC
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select RTC_LIB
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select SPARSE_IRQ
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select SYSCTL_ARCH_UNALIGN_ALLOW
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select SYSCTL_ARCH_UNALIGN_NO_WARN
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select SYSCTL_EXCEPTION_TRACE
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select SWIOTLB
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select TRACE_IRQFLAGS_SUPPORT
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select USE_PERCPU_NUMA_NODE_ID
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select USER_STACKTRACE_SUPPORT
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select ZONE_DMA32
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config 32BIT
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bool
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config 64BIT
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def_bool y
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config GENERIC_BUG
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def_bool y
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depends on BUG
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config GENERIC_BUG_RELATIVE_POINTERS
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def_bool y
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depends on GENERIC_BUG
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config GENERIC_CALIBRATE_DELAY
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def_bool y
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config GENERIC_CSUM
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def_bool y
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config GENERIC_HWEIGHT
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def_bool y
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config L1_CACHE_SHIFT
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int
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default "6"
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config LOCKDEP_SUPPORT
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bool
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default y
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config STACKTRACE_SUPPORT
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bool
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default y
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# MACH_LOONGSON32 and MACH_LOONGSON64 are deliberately carried over from the
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# MIPS Loongson code, to preserve Loongson-specific code paths in drivers that
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# are shared between architectures, and specifically expecting the symbols.
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config MACH_LOONGSON32
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def_bool 32BIT
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config MACH_LOONGSON64
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def_bool 64BIT
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config FIX_EARLYCON_MEM
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def_bool y
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config PGTABLE_2LEVEL
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bool
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config PGTABLE_3LEVEL
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bool
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config PGTABLE_4LEVEL
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bool
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config PGTABLE_LEVELS
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int
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default 2 if PGTABLE_2LEVEL
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default 3 if PGTABLE_3LEVEL
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default 4 if PGTABLE_4LEVEL
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config SCHED_OMIT_FRAME_POINTER
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bool
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default y
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config AS_HAS_EXPLICIT_RELOCS
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def_bool $(as-instr,x:pcalau12i \$t0$(comma)%pc_hi20(x))
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config AS_HAS_FCSR_CLASS
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def_bool $(as-instr,movfcsr2gr \$t0$(comma)\$fcsr0)
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config AS_HAS_THIN_ADD_SUB
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def_bool $(cc-option,-Wa$(comma)-mthin-add-sub)
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config AS_HAS_LSX_EXTENSION
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def_bool $(as-instr,vld \$vr0$(comma)\$a0$(comma)0)
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config AS_HAS_LASX_EXTENSION
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def_bool $(as-instr,xvld \$xr0$(comma)\$a0$(comma)0)
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config AS_HAS_LBT_EXTENSION
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def_bool $(as-instr,movscr2gr \$a0$(comma)\$scr0)
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config AS_HAS_LVZ_EXTENSION
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def_bool $(as-instr,hvcl 0)
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menu "Kernel type and options"
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source "kernel/Kconfig.hz"
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choice
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prompt "Page Table Layout"
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default 16KB_2LEVEL if 32BIT
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default 16KB_3LEVEL if 64BIT
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help
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Allows choosing the page table layout, which is a combination
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of page size and page table levels. The size of virtual memory
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address space are determined by the page table layout.
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config 4KB_3LEVEL
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bool "4KB with 3 levels"
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select HAVE_PAGE_SIZE_4KB
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select PGTABLE_3LEVEL
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help
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This option selects 4KB page size with 3 level page tables, which
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support a maximum of 39 bits of application virtual memory.
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config 4KB_4LEVEL
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bool "4KB with 4 levels"
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select HAVE_PAGE_SIZE_4KB
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select PGTABLE_4LEVEL
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help
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This option selects 4KB page size with 4 level page tables, which
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support a maximum of 48 bits of application virtual memory.
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config 16KB_2LEVEL
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bool "16KB with 2 levels"
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select HAVE_PAGE_SIZE_16KB
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select PGTABLE_2LEVEL
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help
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This option selects 16KB page size with 2 level page tables, which
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support a maximum of 36 bits of application virtual memory.
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config 16KB_3LEVEL
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bool "16KB with 3 levels"
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select HAVE_PAGE_SIZE_16KB
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select PGTABLE_3LEVEL
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help
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This option selects 16KB page size with 3 level page tables, which
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support a maximum of 47 bits of application virtual memory.
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config 64KB_2LEVEL
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bool "64KB with 2 levels"
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select HAVE_PAGE_SIZE_64KB
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select PGTABLE_2LEVEL
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help
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This option selects 64KB page size with 2 level page tables, which
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support a maximum of 42 bits of application virtual memory.
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config 64KB_3LEVEL
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bool "64KB with 3 levels"
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select HAVE_PAGE_SIZE_64KB
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select PGTABLE_3LEVEL
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help
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This option selects 64KB page size with 3 level page tables, which
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support a maximum of 55 bits of application virtual memory.
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endchoice
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config CMDLINE
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string "Built-in kernel command line"
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help
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For most platforms, the arguments for the kernel's command line
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are provided at run-time, during boot. However, there are cases
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where either no arguments are being provided or the provided
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arguments are insufficient or even invalid.
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When that occurs, it is possible to define a built-in command
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line here and choose how the kernel should use it later on.
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choice
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prompt "Kernel command line type"
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default CMDLINE_BOOTLOADER
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help
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Choose how the kernel will handle the provided built-in command
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line.
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config CMDLINE_BOOTLOADER
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bool "Use bootloader kernel arguments if available"
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help
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Prefer the command-line passed by the boot loader if available.
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Use the built-in command line as fallback in case we get nothing
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during boot. This is the default behaviour.
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config CMDLINE_EXTEND
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bool "Use built-in to extend bootloader kernel arguments"
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help
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The command-line arguments provided during boot will be
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appended to the built-in command line. This is useful in
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cases where the provided arguments are insufficient and
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you don't want to or cannot modify them.
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config CMDLINE_FORCE
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bool "Always use the built-in kernel command string"
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help
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Always use the built-in command line, even if we get one during
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boot. This is useful in case you need to override the provided
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command line on systems where you don't have or want control
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over it.
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endchoice
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config BUILTIN_DTB
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bool "Enable built-in dtb in kernel"
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depends on OF
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help
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Some existing systems do not provide a canonical device tree to
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the kernel at boot time. Let's provide a device tree table in the
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kernel, keyed by the dts filename, containing the relevant DTBs.
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Built-in DTBs are generic enough and can be used as references.
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config BUILTIN_DTB_NAME
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string "Source file for built-in dtb"
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depends on BUILTIN_DTB
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help
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Base name (without suffix, relative to arch/loongarch/boot/dts/)
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for the DTS file that will be used to produce the DTB linked into
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the kernel.
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config DMI
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bool "Enable DMI scanning"
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select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
|
|
default y
|
|
help
|
|
This enables SMBIOS/DMI feature for systems, and scanning of
|
|
DMI to identify machine quirks.
|
|
|
|
config EFI
|
|
bool "EFI runtime service support"
|
|
select UCS2_STRING
|
|
select EFI_RUNTIME_WRAPPERS
|
|
help
|
|
This enables the kernel to use EFI runtime services that are
|
|
available (such as the EFI variable services).
|
|
|
|
config EFI_STUB
|
|
bool "EFI boot stub support"
|
|
default y
|
|
depends on EFI
|
|
select EFI_GENERIC_STUB
|
|
help
|
|
This kernel feature allows the kernel to be loaded directly by
|
|
EFI firmware without the use of a bootloader.
|
|
|
|
config SCHED_SMT
|
|
bool "SMT scheduler support"
|
|
depends on SMP
|
|
default y
|
|
help
|
|
Improves scheduler's performance when there are multiple
|
|
threads in one physical core.
|
|
|
|
config SMP
|
|
bool "Multi-Processing support"
|
|
help
|
|
This enables support for systems with more than one CPU. If you have
|
|
a system with only one CPU, say N. If you have a system with more
|
|
than one CPU, say Y.
|
|
|
|
If you say N here, the kernel will run on uni- and multiprocessor
|
|
machines, but will use only one CPU of a multiprocessor machine. If
|
|
you say Y here, the kernel will run on many, but not all,
|
|
uniprocessor machines. On a uniprocessor machine, the kernel
|
|
will run faster if you say N here.
|
|
|
|
See also the SMP-HOWTO available at <http://www.tldp.org/docs.html#howto>.
|
|
|
|
If you don't know what to do here, say N.
|
|
|
|
config HOTPLUG_CPU
|
|
bool "Support for hot-pluggable CPUs"
|
|
depends on SMP
|
|
select GENERIC_IRQ_MIGRATION
|
|
help
|
|
Say Y here to allow turning CPUs off and on. CPUs can be
|
|
controlled through /sys/devices/system/cpu.
|
|
(Note: power management support will enable this option
|
|
automatically on SMP systems. )
|
|
Say N if you want to disable CPU hotplug.
|
|
|
|
config NR_CPUS
|
|
int "Maximum number of CPUs (2-256)"
|
|
range 2 256
|
|
depends on SMP
|
|
default "64"
|
|
help
|
|
This allows you to specify the maximum number of CPUs which this
|
|
kernel will support.
|
|
|
|
config NUMA
|
|
bool "NUMA Support"
|
|
select SMP
|
|
help
|
|
Say Y to compile the kernel with NUMA (Non-Uniform Memory Access)
|
|
support. This option improves performance on systems with more
|
|
than one NUMA node; on single node systems it is generally better
|
|
to leave it disabled.
|
|
|
|
config NODES_SHIFT
|
|
int
|
|
default "6"
|
|
depends on NUMA
|
|
|
|
config ARCH_FORCE_MAX_ORDER
|
|
int "Maximum zone order"
|
|
default "13" if PAGE_SIZE_64KB
|
|
default "11" if PAGE_SIZE_16KB
|
|
default "10"
|
|
help
|
|
The kernel memory allocator divides physically contiguous memory
|
|
blocks into "zones", where each zone is a power of two number of
|
|
pages. This option selects the largest power of two that the kernel
|
|
keeps in the memory allocator. If you need to allocate very large
|
|
blocks of physically contiguous memory, then you may need to
|
|
increase this value.
|
|
|
|
The page size is not necessarily 4KB. Keep this in mind
|
|
when choosing a value for this option.
|
|
|
|
config ARCH_IOREMAP
|
|
bool "Enable LoongArch DMW-based ioremap()"
|
|
help
|
|
We use generic TLB-based ioremap() by default since it has page
|
|
protection support. However, you can enable LoongArch DMW-based
|
|
ioremap() for better performance.
|
|
|
|
config ARCH_WRITECOMBINE
|
|
bool "Enable WriteCombine (WUC) for ioremap()"
|
|
help
|
|
LoongArch maintains cache coherency in hardware, but when paired
|
|
with LS7A chipsets the WUC attribute (Weak-ordered UnCached, which
|
|
is similar to WriteCombine) is out of the scope of cache coherency
|
|
machanism for PCIe devices (this is a PCIe protocol violation, which
|
|
may be fixed in newer chipsets).
|
|
|
|
This means WUC can only used for write-only memory regions now, so
|
|
this option is disabled by default, making WUC silently fallback to
|
|
SUC for ioremap(). You can enable this option if the kernel is ensured
|
|
to run on hardware without this bug.
|
|
|
|
You can override this setting via writecombine=on/off boot parameter.
|
|
|
|
config ARCH_STRICT_ALIGN
|
|
bool "Enable -mstrict-align to prevent unaligned accesses" if EXPERT
|
|
default y
|
|
help
|
|
Not all LoongArch cores support h/w unaligned access, we can use
|
|
-mstrict-align build parameter to prevent unaligned accesses.
|
|
|
|
CPUs with h/w unaligned access support:
|
|
Loongson-2K2000/2K3000/3A5000/3C5000/3D5000.
|
|
|
|
CPUs without h/w unaligned access support:
|
|
Loongson-2K500/2K1000.
|
|
|
|
This option is enabled by default to make the kernel be able to run
|
|
on all LoongArch systems. But you can disable it manually if you want
|
|
to run kernel only on systems with h/w unaligned access support in
|
|
order to optimise for performance.
|
|
|
|
config CPU_HAS_FPU
|
|
bool
|
|
default y
|
|
|
|
config CPU_HAS_LSX
|
|
bool "Support for the Loongson SIMD Extension"
|
|
depends on AS_HAS_LSX_EXTENSION
|
|
help
|
|
Loongson SIMD Extension (LSX) introduces 128 bit wide vector registers
|
|
and a set of SIMD instructions to operate on them. When this option
|
|
is enabled the kernel will support allocating & switching LSX
|
|
vector register contexts. If you know that your kernel will only be
|
|
running on CPUs which do not support LSX or that your userland will
|
|
not be making use of it then you may wish to say N here to reduce
|
|
the size & complexity of your kernel.
|
|
|
|
If unsure, say Y.
|
|
|
|
config CPU_HAS_LASX
|
|
bool "Support for the Loongson Advanced SIMD Extension"
|
|
depends on CPU_HAS_LSX
|
|
depends on AS_HAS_LASX_EXTENSION
|
|
help
|
|
Loongson Advanced SIMD Extension (LASX) introduces 256 bit wide vector
|
|
registers and a set of SIMD instructions to operate on them. When this
|
|
option is enabled the kernel will support allocating & switching LASX
|
|
vector register contexts. If you know that your kernel will only be
|
|
running on CPUs which do not support LASX or that your userland will
|
|
not be making use of it then you may wish to say N here to reduce
|
|
the size & complexity of your kernel.
|
|
|
|
If unsure, say Y.
|
|
|
|
config CPU_HAS_LBT
|
|
bool "Support for the Loongson Binary Translation Extension"
|
|
depends on AS_HAS_LBT_EXTENSION
|
|
help
|
|
Loongson Binary Translation (LBT) introduces 4 scratch registers (SCR0
|
|
to SCR3), x86/ARM eflags (eflags) and x87 fpu stack pointer (ftop).
|
|
Enabling this option allows the kernel to allocate and switch registers
|
|
specific to LBT.
|
|
|
|
If you want to use this feature, such as the Loongson Architecture
|
|
Translator (LAT), say Y.
|
|
|
|
config CPU_HAS_PREFETCH
|
|
bool
|
|
default y
|
|
|
|
config ARCH_SUPPORTS_KEXEC
|
|
def_bool y
|
|
|
|
config ARCH_SUPPORTS_CRASH_DUMP
|
|
def_bool y
|
|
|
|
config ARCH_SELECTS_CRASH_DUMP
|
|
def_bool y
|
|
depends on CRASH_DUMP
|
|
select RELOCATABLE
|
|
|
|
config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION
|
|
def_bool CRASH_RESERVE
|
|
|
|
config RELOCATABLE
|
|
bool "Relocatable kernel"
|
|
select ARCH_HAS_RELR
|
|
help
|
|
This builds the kernel as a Position Independent Executable (PIE),
|
|
which retains all relocation metadata required, so as to relocate
|
|
the kernel binary at runtime to a different virtual address from
|
|
its link address.
|
|
|
|
config RANDOMIZE_BASE
|
|
bool "Randomize the address of the kernel (KASLR)"
|
|
depends on RELOCATABLE
|
|
help
|
|
Randomizes the physical and virtual address at which the
|
|
kernel image is loaded, as a security feature that
|
|
deters exploit attempts relying on knowledge of the location
|
|
of kernel internals.
|
|
|
|
The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
|
|
|
|
If unsure, say N.
|
|
|
|
config RANDOMIZE_BASE_MAX_OFFSET
|
|
hex "Maximum KASLR offset" if EXPERT
|
|
depends on RANDOMIZE_BASE
|
|
range 0x0 0x10000000
|
|
default "0x01000000"
|
|
help
|
|
When KASLR is active, this provides the maximum offset that will
|
|
be applied to the kernel image. It should be set according to the
|
|
amount of physical RAM available in the target system.
|
|
|
|
This is limited by the size of the lower address memory, 256MB.
|
|
|
|
source "kernel/livepatch/Kconfig"
|
|
|
|
config PARAVIRT
|
|
bool "Enable paravirtualization code"
|
|
depends on AS_HAS_LVZ_EXTENSION
|
|
help
|
|
This changes the kernel so it can modify itself when it is run
|
|
under a hypervisor, potentially improving performance significantly
|
|
over full virtualization. However, when run without a hypervisor
|
|
the kernel is theoretically slower and slightly larger.
|
|
|
|
config PARAVIRT_TIME_ACCOUNTING
|
|
bool "Paravirtual steal time accounting"
|
|
depends on PARAVIRT
|
|
help
|
|
Select this option to enable fine granularity task steal time
|
|
accounting. Time spent executing other tasks in parallel with
|
|
the current vCPU is discounted from the vCPU power. To account for
|
|
that, there can be a small performance impact.
|
|
|
|
If in doubt, say N here.
|
|
|
|
endmenu
|
|
|
|
config ARCH_SELECT_MEMORY_MODEL
|
|
def_bool y
|
|
|
|
config ARCH_FLATMEM_ENABLE
|
|
def_bool y
|
|
depends on !NUMA
|
|
|
|
config ARCH_SPARSEMEM_ENABLE
|
|
def_bool y
|
|
select SPARSEMEM_VMEMMAP_ENABLE
|
|
help
|
|
Say Y to support efficient handling of sparse physical memory,
|
|
for architectures which are either NUMA (Non-Uniform Memory Access)
|
|
or have huge holes in the physical address space for other reasons.
|
|
See <file:Documentation/mm/numa.rst> for more.
|
|
|
|
config ARCH_MEMORY_PROBE
|
|
def_bool y
|
|
depends on MEMORY_HOTPLUG
|
|
|
|
config MMU
|
|
bool
|
|
default y
|
|
|
|
config ARCH_MMAP_RND_BITS_MIN
|
|
default 12
|
|
|
|
config ARCH_MMAP_RND_BITS_MAX
|
|
default 18
|
|
|
|
config ARCH_SUPPORTS_UPROBES
|
|
def_bool y
|
|
|
|
config KASAN_SHADOW_OFFSET
|
|
hex
|
|
default 0x0
|
|
depends on KASAN
|
|
|
|
menu "Power management options"
|
|
|
|
config ARCH_SUSPEND_POSSIBLE
|
|
def_bool y
|
|
|
|
config ARCH_HIBERNATION_POSSIBLE
|
|
def_bool y
|
|
|
|
source "kernel/power/Kconfig"
|
|
source "drivers/acpi/Kconfig"
|
|
source "drivers/cpufreq/Kconfig"
|
|
|
|
endmenu
|
|
|
|
source "arch/loongarch/kvm/Kconfig"
|